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ADRF5040BCPZ-R7 数据表(PDF) 12 Page - Analog Devices

部件名 ADRF5040BCPZ-R7
功能描述  High power handling
PDF  14 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADRF5040BCPZ-R7 数据表(HTML) 12 Page - Analog Devices

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ADRF5040
Data Sheet
Rev. A | Page 12 of 14
THEORY OF OPERATION
The ADRF5040 requires a positive supply voltage applied to the
VDD pin and a negative voltage supply applied to the VSS pin.
Bypassing capacitors are recommended on the supply lines to
minimize RF coupling.
The ADRF5040 is controlled via two digital control voltages
applied to the V1 pin and the V2 pin. A small value bypassing
capacitor is recommended on these digital signal lines to
improve the RF signal isolation.
The ADRF5040 is internally matched to 50 Ω at the RF input
port (RFC) and the RF output ports (RF1, RF2, RF3, and RF4);
therefore, no external matching components are required. The
RF1 through RF4 pins are dc-coupled, and dc blocking capacitors
are required on the RF paths. The design is bidirectional; the
input and outputs are interchangeable.
The ADRF5040 does not need any special power-up sequencing,
and the relative order to power up the VDD and VSS supplies is not
important. The V1 and V2 control signals can be applied only
after VDD is powered up; this sequence avoids forward biasing
and causing damage to the internal ESD protection circuits.
Turn on the RF signal after the device supply settles to a steady
state.



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