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P9027LP-R 数据表(PDF) 4 Page - Integrated Device Technology |
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P9027LP-R 数据表(HTML) 4 Page - Integrated Device Technology |
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4 / 27 page ![]() P9027LP-R Datasheet © 2016 Integrated Device Technology, Inc 4 April 28, 2016 Electrical Specification Table (Continued) VRECT=6.5 V, COUT=CVRECT=20 µF, CFLY=47 nF, CVDD=1 µF, EN ̅̅̅̅=GND, VOUT=5 V, TA= 0 to +85°C, unless otherwise noted. Typical values are 25°C. Table 4. Electrical Specification Table (Continued) Symbol Description Conditions Min Typical Max Units 12-bit Analog to Digital Converter VREF Reference voltage 1.8 V FSR Error1 VDD = 5.0 V 0.1 2.3 % FSR VDD = 5.0 V, TA = 25 oC 0.1 0.6 fSAMPLE Sampling rate 60 kS/s VHDR, VSET, TS1, TS2, IOC ISRC Source current VDD = 3.0 - 5.5V 98 100 102 μA VRSNS Sense voltage 0 1.8 V RSET Resistor range 1% tolerance 0 18 kΩ Digital Inputs and Outputs (SCL, SDA, EN ̅̅̅̅, INT ̅̅̅̅̅, ACT ̅̅̅̅̅̅, EOC) VOL Open drain: INT ̅̅̅̅̅, ACT ̅̅̅̅̅̅ ISINK = 4 mA 0.4 V VIH Input logic high voltage 1.0 V VIL Input logic low Voltage 0.4 V I2C Interface VIH Input high voltage SCL, SDA 1.1 V VIL Input low Voltage SCL, SDA 0.4 V fSCL Clock frequency 400 kHz CB Capacitive load 150 pF CBIN SCL, SDA input capacitance 5 pF tHD,STA Hold Time (Repeated) for START Condition 0.6 µs tHD:DAT Data Hold Time 0 ns tLOW Clock Low Period 1.3 µs tHIGH Clock High Period 0.6 µs |
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