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ZSLS7025 Datasheet

April 20, 2016

Circuit Description

2.1

ZSLS7025 Overview

The ZSLS7025 is a constant current boost converter. Its output current is adjustable via an external current sense

resistor, and it can deliver stable constant output current from a few milliamps up to 2A or higher.

The ZSLS7025 drives a constant current into the load, automatically adjusting the output voltage according to the

load. The control loop features a pulse frequency modulated (PFM) architecture that is inherently stable and does not

need loop compensation.

The ZSLS7025 can operate in applications with a wide input voltage range from 5V to 100V. VIN voltages above 100V

can be supported if logic level MOSFETs for the higher voltage rating are available. An integrated over-voltage

protection (OVP) circuit protects the system, even under no-load conditions. The over-voltage protection is adjustable

via external resistors R1 and R2. The minimum load voltage must always be higher than the maximum VIN, and the

drain voltage rating of the switching transistor (Q1) must be higher than the over-voltage shut-off limit.

Note: The ZSLS7025 has an internal 5V shunt regulator connected to the VDD pin. The RVDD series resistor must be

connected between the VDD pin and VIN to limit current flow.

See section 4.2 for requirements for selecting the external components referred to in the following sections.

Figure 2.1

Typical ZSLS7025 Circuit Diagram

TOFF

GATE

ZSLS7025

LED

String

VIN =5 to 100 VDC

COUT

CIN

OVP

GND

RFB

VDD

CVDD

RVDD

RTOFF

ADJ

RCS

2.2

Boost Converter

The ZSLS7025's boost converter uses a peak-current mode topology. The CS pin voltage in conjunction with the

current-sense resistor RCS determines the peak current in the inductor (L1). Q1 is turned on and off by the output of an

RS flip-flop that is set when the voltage on the FB pin drops below the internal threshold of 300 mV. After Q1 has

been switched on, a blanking timer disables the current sense input CS to avoid immediate spurious shut-off as a

result of the switching transient when Q1 discharges the parasitic capacitances on its drain node to ground. After the

blanking time tBLANK (see parameter 1.3.6 in section 1.3) has elapsed, the current through the inductor is sensed as a

voltage drop across RCS, and when the voltage reaches the peak-current sense threshold voltage VCS_TH (see

parameter 1.3.5 in section 1.3), the flip-flop is reset and Q1 is turned off. Once Q1 is turned off, the inductor reverses

polarity, providing the voltage boost, and the inductor current will decrease until the input voltage on the FB pin drops

below the internal feedback reference voltage VFB, (see parameter 1.3.11 in section 1.3). Q1 is then turned on again,

and this operation repeats in each cycle.

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