ZSLS7031 Datasheet

© 2016 Integrated Device Technology, Inc.

11

January 26, 2016

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Ω

×

=

k

R

kHz

f

SET

3

10

15

Figure 2.3

Active PFC

integrated AGC ensures that the peak current of the inductor remains constant with changing input voltage. This

allows the ZSLS7031 to actively correct the power factor while maintaining a constant power output during

operation. The resistor network connected to VSINE should be computed so that the peak input voltage condition

corresponds to ~2.4VDC. For example, for 265VAC, the peak voltage is 374.7V. At 374.7V input, the output of the

network should be 2.4V; therefore values of R1=1.86M and R2 = 12k are appropriate. Precision resistors of 1%

tolerance or better must be used. A small capacitor, C2, is used to filter high frequency noise that may couple to

the VSINE pin.

2.6

Operating Frequency

The operating frequency is set by connecting a resistor between the FSET pin and ground. The relationship

between the frequency and resistance is given in equation (1).

(1)