WM8955L datasheet(27/43 Pages) WOLFSON

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WM8955L

Product Preview Rev 0.4 May2003

LEFT CHANNEL

RIGHT CHANNEL

DACLRC

BCLK

DACDAT

1/fs

n-2 n-1

LSB

MSB

n-2 n-1

LSB

MSB

Data Word Length (WL)

Note: Word length is defined bythe WL register.

Timing is shown with LRP = 1

Figure 11 Right JustifiedAudio Interface (assuming n-bit word length)

In I

2S mode, the MSB is available on the second rising edge of BCLK following a DACLRC transition.

The other bits up to the LSB are then transmitted in order. Depending on word length, BCLK

frequencyand sample rate, there maybe unused BCLK cycles between the LSB of one sample and

the MSB of the next.

LEFT CHANNEL

RIGHT CHANNEL

DACLRC

BCLK

DACDAT

1/fs

n-2 n-1

LSB

MSB

n-2 n-1

LSB

MSB

1BCLK

Data Word Length (WL)

Note: Word length is defined bythe WL register.

Timing is shown with LRP = 1

Figure 12 I

2S JustifiedAudio Interface (assuming n-bit word length)

In DSP mode, the left channel MSB is available on either the first or second rising edge of BCLK

(selectable byLRP) following a rising edge of DACLRC. Right channel data immediatelyfollows left

channel data. Depending on word length, BCLK frequencyand sample rate, there maybe unused

BCLK cycles between the LSB of the right channel data and the next sample.

LEFT CHANNEL

RIGHT CHANNEL

DACLRC

BCLK

DACDAT

n-2 n-1

LSB

MSB

n-2 n-1

1 BCLK

Data Word Length (WL)

Note: Word length is defined bythe WL register.

Timing is shown with LRP = 1

1/fs

Figure 13 DSP Mode Audio Interface (Mode A; LRP = 0)

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WM8955L 数据表(PDF) 27 Page - Wolfson Microelectronics plc

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