MAX96708 datasheet(39/68 Pages) MAXIM

39 / 68 page

config (0x07)

BIT

Field

DBL

DRS

BWS

RSVD

HVEN

CXTP

PXL_CRC

Reset

Access Type Write, Read Write, Read Write, Read Write, Read Write, Read Write, Read Write, Read Write, Read

BITFIELD

BITS

DESCRIPTION

DECODE

DBL

Double-Output Mode

0: Use single-rate output

1: Use double-rate output (2x word rate at

1/2x width)

DRS

Data-Rate Select

0: Use normal data-rate output

1: Use 1/2 rate data output (for use with low

data rates)

BWS

Bus-Width Select

0: Set bus width for 22-bit bus, 24-bit mode

1: Set bus width for 30-bit bus (32-bit mode)

Edge Select

0: Set output data valid on rising edge of

PCLKOUT

1: Set output data valid on falling edge of

PCLKOUT

RSVD

Reserved: Do not change from default value

0: Reserved

HVEN

HS/VS Encoding Enable

0: Disable HS/VS encoding

1: Enable HS/VS encoding

CXTP

Coax/TP Select

0: Use differential-output mode (for use with

twisted-pair cable)

1: Use single-ended output mode (for use with

coax cable)

PXL_CRC

Pixel CRC Enable: Pixel error-detection type

0: Use 1-bit parity (compatible with all devices)

1: Use 6-bit CRC

www.maximintegrated.com

Maxim Integrated │ 39

MAX96708

14-Bit GMSL Deserializer

with Coax or STP Cable Input

MAX96708 数据表(PDF) 39 Page - Maxim Integrated Products

MAX96708 数据表(HTML) 39 Page - Maxim Integrated Products

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