THCV231 datasheet(4/56 Pages) THINE

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THCV231_THCV236_Rev.2.30_E

THine Electronics, Inc.

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Pin Description

Pin Description for THCV231

Pin Name

Pin No.

Type

Description

TXP

High-Speed CML Signal Output (Main-Link)

TXN

High-Speed CML Signal Output (Main-Link)

TCMP

CML Signal Bidirectional Input/Output (Sub-Link)

TCMN

CML Signal Bidirectional Input/Output (Sub-Link)

GPIO4

GPIO4 : General Purpose Input/Output.

When GPIO4 is used as Open-Drain Output, it must be

connected with a pull-up resistor to VDD.

When GPIO4 is used as push pull output, no external

component is required.

LATEN : Latch select input under Field BET (Sub-Link)

0 : Forbidden

1 : Latched result

GPIO3

GPIO3 : General Purpose Input/Output.

When GPIO3 is used as Open-Drain Output, it must be

connected with a pull-up resistor to VDD.

When GPIO3 is used as push pull output, no external

component is required.

SCL

SCL input/output for 2-wire serial I/F.

SDA

SDA input/output for 2-wire serial I/F.

CLKIN

Clock Input

D11-D0

23,22,20-17,15,14,12-9

Pixel Data Input

HSYNC

HSYNC Input

VSYNC

VSYNC Input

RF/BETOUT

RF : Input Clock Triggering edge select. See Figure 15.

0 : Falling Edge

1 : Rising Edge

BETOUT : Field BET Result Output when Field BET

mode.

PDN

Power Down

0 : Power Down

1 : Normal Operation

TEST2

Test pin. Must be tied to Ground for normal operation.

TEST1

Test pin. Must be tied to Ground for normal operation.

CAPOUT

PWR Decoupling Capacitor Pin, 1.2V output.

CAPINA

PWR Reference Input for Analog Circuit. Must be tied to

CAPOUT.

CAPINP

PWR Reference Input for Analog Circuit. Must be tied to

CAPOUT.

VDD

PWR 1.7-3.6V Digital Power Supply Pin for LVCMOS I/O

AVDD

PWR 1.7-3.6V Analog Power Supply Pin for LDO

EXPGND

GND Exposed Pad Ground. Must be tied to the PCB ground

plane through an array of vias.

CO : CML Output buffer , CB : CML Bi-directional buffer

I : LVCMOS Input buffer , IL : Low Speed LVCMOS Input buffer , B : LVCMOS Bi-directional buffer

PWR : Power supply , GND : Ground

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