COM20020IP3V datasheet(43/72 Pages) SMSC

43 / 72 page

token to make a round trip through the network,

one of three situations exists. Either the node is

disconnected from the network, or there are no

other nodes on the network, or the external

receive circuitry has failed. These situations can

be determined by either using the improved

diagnostic features of the COM20020 or using

another software timeout which is greater than the

worst case time for a round trip token pass, which

occurs when all nodes transmit a maximum length

message.

Receive Sequence

A receive sequence begins with the RI status bit

becoming a logic "1", which indicates that a

reception

has

concluded.

The

microcontroller

will

interrupted

the

corresponding bit in the Interrupt Mask Register is

set to logic "1". Otherwise, the microcontroller

must periodically check the Status Register. Once

the microcontroller is alerted to the fact that the

previous reception has concluded, it may issue

the "Enable Receive to Page fnn" command,

which resets the RI bit to logic "0" and selects a

new page in the RAM buffer.

Again, the

appropriate buffer size is specified in the "Define

Configuration" command.

Typically, the page

which just received the data packet will be read by

the microcontroller at this point. Once the "Enable

Receive to Page fnn" command is issued, the

microcontroller attends to other duties. There is

no way of knowing how long the new reception will

take, since another node may transmit a packet at

any time. When another node does transmit a

packet

this

node,

and

the

"Define

Configuration"

command

has

enabled

the

reception

long

packets,

the

COM20020

interprets the packet as either a long or short

packet, depending on whether the content of the

buffer location 2 is zero or non-zero. The format

of the buffer is shown in Figure 10. Address 0

contains the Source Identifier (SID), Address 1

contains the Destination Identifier (DID), and

Address 2 contains, for short packets, the value

256-N, where N represents the message length,

or for long packets, the value 0, indicating that it is

indeed a long packet. In the latter case, Address

3 contains the value 512-N, where N represents

the message length. Note that on reception, the

COM20020 deposits packets into the RAM buffer

in the same format that the transmitting node

arranges them, which allows for a message to be

received

and

then

retransmitted

without

rearranging any bytes in the RAM buffer other

than the SID and DID. Once the packet is

received and stored correctly in the selected

buffer, the COM20020 sets the RI bit to logic "1"

to signal the microcontroller that the reception is

complete.

FIGURE 10 - COMMAND CHAINING STATUS REGISTER QUEUE

TRI

POR

TEST

RECON

TMA

TTA

TMA

TTA

TRI

MSB

LSB

COM20020IP3V 数据表(PDF) 43 Page - SMSC Corporation

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