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MPC860DP 数据表(PDF) 23 Page - Motorola, Inc

部件名 MPC860DP
功能描述  Family Hardware Specifications
PDF  76 Pages
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制造商  MOTOROLA [Motorola, Inc]
网页  http://www.freescale.com
标志 MOTOROLA - Motorola, Inc

MPC860DP 数据表(HTML) 23 Page - Motorola, Inc

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MOTOROLA
MPC860 Family Hardware Specifications
23
Bus Signal Timing
Figure 9-6 provides the timing for the synchronous input signals.
Figure 9-6. Synchronous Input Signals Timing
Figure 9-7 provides normal case timing for input data. It also applies to normal read
accesses under the control of the UPM in the memory controller.
Figure 9-7. Input Data Timing in Normal Case
Figure 9-8 provides the timing for the input data controlled by the UPM for data beats
where DLT3 = 1 in the UPM RAM words. (This is only the case where data is latched on
the falling edge of CLKOUT.)
CLKOUT
TA, BI
TEA, KR,
RETRY, CR
BB, BG, BR
B16
B17
B16a
B17a
B16b
B17
CLKOUT
TA
D[0:31],
DP[0:3]
B16
B17
B19
B18



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