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AM29PLI60C 数据表(PDF) 21 Page - Advanced Micro Devices

部件名 AM29PLI60C
功能描述  16 Megabit (2 M x 8-Bit/1 M x 16-Bit) CMOS 3.0 Volt-only High Performance Page Mode Flash Memory
PDF  44 Pages
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制造商  AMD [Advanced Micro Devices]
网页  http://www.amd.com
标志 AMD - Advanced Micro Devices

AM29PLI60C 数据表(HTML) 21 Page - Advanced Micro Devices

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20
Am29PL160C
June 12, 2002
Command Definitions
Table 10.
Am29PL160C Command Definitions
Legend:
X = Don’t care
RA = Address of the memory location to be read.
RD = Data read from location RA during read operation.
PA = Address of the memory location to be programmed. Addresses
latch on the falling edge of the WE# or CE# pulse, whichever
happens later.
PD = Data to be programmed at location PA. Data latches on the
rising edge of WE# or CE# pulse, whichever happens first.
SA = Address of the sector to be verified (in autoselect mode) or
erased. Address bits A19–A12 uniquely select any sector.
Notes:
1.
See Table 1 for description of bus operations.
2.
All values are in hexadecimal.
3.
Except for the read cycle and the fourth cycle of the autoselect
command sequence, all bus cycles are write cycles.
4.
Data bits DQ15–DQ8 are don’t cares for unlock and command
cycles.
5.
Address bits A19–A11 are don’t cares for unlock and command
cycles, unless SA or PA required.
6.
No unlock or command cycles required when reading array data.
7.
The Reset command is required to return to reading array data
when device is in the autoselect mode, or if DQ5 goes high (while
the device is providing status data).
8.
The fourth cycle of the autoselect command sequence is a read
cycle.
9.
The data is 00h for an unprotected sector and 01h for a protected
sector. See “Autoselect Command Sequence” for more
information.
10. Command is valid when device is ready to read array data or
when device is in autoselect mode.
11. The Unlock Bypass command is required prior to the Unlock
Bypass Program command.
12. The Unlock Bypass Reset command is required to return to
reading array data when the device is in the unlock bypass
mode.
13. The system may read and program in non-erasing sectors, or
enter the autoselect mode, when in the Erase Suspend mode.
The Erase Suspend command is valid only during a sector erase
operation.
14. The Erase Resume command is valid only during the Erase Sus-
pend mode.
Command
Sequence
(Note 1)
Bus Cycles (Notes 2–5)
First
Second
Third
Fourth
Fifth
Sixth
Addr
Data
Addr
Data
Addr
Data Addr
Data
Addr Data
Addr
Data
Read (Note 6)
1
RA
RD
Reset (Note 7)
1
XXX
F0
Manufacturer ID
Word
4
555
AA
2AA
55
555
90
X00
01
Byte
AAA
555
AAA
Device ID,
Bottom Boot Block
Word
4
555
AA
2AA
55
555
90
X01
2245
Byte
AAA
555
AAA
X02
45
Sector Protect Verify
(Note 9)
Word
4
555
AA
2AA
55
555
90
(SA)
X02
XX00
XX01
Byte
AAA
555
AAA
(SA)
X04
00
01
CFI Query (Note 10)
Word
1
55
98
Byte
AA
Program
Word
4
555
AA
2AA
55
555
A0
PA
PD
Byte
AAA
555
AAA
Unlock Bypass
Word
3
555
AA
2AA
55
555
20
Byte
AAA
555
AAA
Unlock Bypass Program (Note 11)
2
XXX
A0
PA
PD
Unlock Bypass Reset (Note 12)
2
XXX
90
XXX
00
Chip Erase
Word
6
555
AA
2AA
55
555
80
555
AA
2AA
55
555
10
Byte
AAA
555
AAA
AAA
555
AAA
Sector Erase
Word
6
555
AA
2AA
55
555
80
555
AA
2AA
55
SA
30
Byte
AAA
555
AAA
AAA
555
Erase Suspend (Note 13)
1
XXX
B0
Erase Resume (Note 14)
1
XXX
30
Temporary Unprotect Enable
Word
4
555
AA
2AA
55
555
E0
XXX
01
Byte
AAA
555
AAA
Temporary Unprotect
Disable
Word
4
555
AA
2AA
55
555
E0
XXX
00
Byte
AAA
555
AAA



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