S2-LPQTR datasheet(29/90 Pages) STMICROELECTRONICS

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S2-LP

Block description

DocID029944 Rev 1

29/90

It is recommended to drive the SDN pin correctly to guarantee a correct battery profile.

5.3

RF synthesizer

A crystal connected to XIN and XOUT provides a clock signal to the frequency synthesizer.

The allowed clock signal frequency is either 24, 25, 26, 48, 50, or 52 MHz.

As an alternative, an external clock signal feeds XIN for proper operation. In this option,

XOUT can be left either floating or tied to ground.

Since the digital macro cannot be clocked at that double frequency (48, 50 or 52 MHz), a

divided clock is used in this case (see Section 4.7: "Crystal oscillator").

The integrated phase locked loop (PLL) is capable to synthesize a band of frequencies

from 430 to 470 MHz or from 860 to 940 MHz, providing the LO signal for the RX chain and

the input signal for the PA in the TX chain.

Frequency tolerance and startup times depend on the crystal used, although some tuning

of the latter parameter is possible through registers from 13.2 mS to 43 mS.

Depending on the RF frequency and channel used, a very high accurate crystal or TCXO

can be required.

The RF synthesizer implements fractional sigma delta architecture to allow fast settling and

narrow channel spacing. It is fully integrated, and it uses a multi-band VCO to cover the

whole frequency range. All internal calibrations are automatic.

According to the frequency synthesized the user must set the charge pump current

according to the LO frequency variations, in order to have a constant loop bandwidth. The

charge pump current is controlled by the PLL_CP_ISEL field (SYNT3 register) and the

PLL_PFD_SPLIT_EN (SYNTH_CONFIG2). These fields should be set in the following way:

Table 34: Charge pump words

VCO Freq (MHz)

fxo (MHz)

PLL_CP_ISEL

PLL_PFD_SPLIT_EN

ICP (μA)

3760

010

120

3760

001

200

3460

011

140

3460

010

240

The S2-LP provides an automatic and very fast calibration procedure for the frequency

synthesizer. If not disabled, it performs the calibration each time the synthesizer is required

to lock to the programmed RF channel frequency (transaction from READY to

LOCK/TX/RX or from RX to TX and vice versa). After completion, the S2-LP uses the

calibration word and is stored in registers.

In order to get the synthesizer locked with the calibration procedure disabled, the correct

calibration words must be previously stored in registers by user for TX and RX respectively.

The advantage is reduce the LOCK setting time.

The transition time enables the S2-LP for frequency hopping operation due to its reduced

response time and very quick programming synthesizer.

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