System and identification registers

STMPE321

16/40

Doc ID 15791 Rev 3

SYS_CFG_2

System configuration 2

Address:

0x04

Type:

R/W

Reset:

0xEF

Description:

This register enables the switching off of the clock supply

76

543

2

1

0

SENSOR

CLOCK 2

SENSOR

CLOCK 1

SENSOR

CLOCK 0

RESERVED

GPIO CLOCK

DISABLE

FIFO CLOCK

DISABLE

TOUCH CLOCK

DISABLE

[7:5] SENSOR CLOCK: See description in Table 7.

[4] RESERVED

[3] RESERVED

[2] GPIO CLOCK DISABLE:

Write ‘1’ to disable the clock to GPIO unit.

[1] FIFO CLOCK DISABLE:

Write ‘1’ to disable the clock to FIFO unit. This must be set to ‘0’ if touch interrupt is required.

[0] TOUCH CLOCK DISABLE:

Write ‘1’ to disable the clock to TOUCH unit.

Table 7.

Sensor clock setting

Mode

Divider

Sensor clock

[2:0]

Active

Calibration

Operational

(6.5 MHz)

1

000

12.8 kHz

100 kHz

2

001

6.4 kHz

50 kHz

4

010

3.2 kHz

25 kHz

8

011

1.6 kHz

12.5 kHz

16

1xx

800 Hz

6.25 kHz

Autosleep

(200 kHz)

1

000

400 Hz

3.2 kHz

2

001

200 Hz

1.6 kHz

4

010

100 Hz

800 Hz

8

011

50 Hz

400 Hz

16

1xx

25 Hz

200 Hz