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STP9N65M2 数据表(PDF) 4 Page - STMicroelectronics

部件名 STP9N65M2
功能描述  Extremely low gate charge
PDF  23 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STP9N65M2 数据表(HTML) 4 Page - STMicroelectronics

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Electrical characteristics
STD9N65M2, STF9N65M2, STP9N65M2, STU9N65M2
4/23
DocID025975 Rev 2
2
Electrical characteristics
(TC = 25 °C unless otherwise specified)
Table 5. On /off states
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
V(BR)DSS
Drain-source
breakdown voltage
VGS = 0, ID = 1 mA
650
V
IDSS
Zero gate voltage
drain current
VGS = 0, VDS = 650 V
1
µA
VGS = 0, VDS = 650 V,
TC=125 °C
100
µA
IGSS
Gate-body leakage
current
VDS = 0, VGS = ± 25 V
±10
µA
VGS(th)
Gate threshold voltage VDS = VGS, ID = 250 µA
2
3
4
V
RDS(on)
Static drain-source
on-resistance
VGS = 10 V, ID = 2.5 A
0.79
0.9
Table 6. Dynamic
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
Ciss
Input capacitance
VDS = 100 V, f = 1 MHz,
VGS = 0
-315
-
pF
Coss
Output capacitance
-
18
-
pF
Crss
Reverse transfer
capacitance
-1-
pF
Coss eq
(1)
1.
Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80%
VDSS
Equivalent output
capacitance
VGS = 0, VDS = 0 to 520 V
-
109
-
pF
RG
Intrinsic gate
resistance
f = 1 MHz open drain
-
6.6
-
Qg
Total gate charge
VDD = 520 V, ID = 5 A,
VGS = 10 V
(see Figure 19)
-10
-
nC
Qgs
Gate-source charge
-
2.5
-
nC
Qgd
Gate-drain charge
-
5
-
nC
Table 7. Switching times
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
td(on)
Turn-on delay time
VDD = 325 V, ID = 2.5 A,
RG = 4.7 Ω, VGS = 10 V
(see Figure 18 and Figure 23)
-7.5
-
ns
tr
Rise time
-
6.6
-
ns
td(off)
Turn-off delay time
-
22.5
-
ns
tf
Fall time
-
18
-
ns



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