STF12N50DM2 datasheet(4/13 Pages) STMICROELECTRONICS

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Electrical characteristics

STF12N50DM2

4/13

DocID026809 Rev 2

Electrical characteristics

(TC = 25 °C unless otherwise specified).

Table 5: Static

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit

V(BR)DSS

Drain-source

breakdown voltage

VGS = 0 V, ID = 1 mA

500

IDSS

Zero gate voltage

drain current

VGS = 0 V, VDS = 500 V

µA

VGS = 0 V, VDS = 500 V,

TC = 125 °C(1)

100

µA

IGSS

Gate-body leakage

current

VDS = 0 V, VGS = ±25 V

±10

µA

VGS(th)

Gate threshold

voltage

VDS = VGS, ID = 250 µA

RDS(on)

Static drain-source

on-resistance

VGS = 10 V, ID = 5.5 A

0.299

0.350

Notes:

(1)Defined by design, not subject to production test.

Table 6: Dynamic

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit

Ciss

Input capacitance

VDS= 100 V, f = 1 MHz,

VGS = 0 V

628

Coss

Output capacitance

Crss

Reverse transfer

capacitance

1.2

Coss eq.(1)

Equivalent output

capacitance

VDS = 0 V to 400 V, VGS = 0 V

Intrinsic gate

resistance

f = 1 MHz open drain

Total gate charge

VDD = 400 V, ID = 11 A,

VGS = 10 V (see Figure 15: "Test

circuit for gate charge behavior")

Qgs

Gate-source charge

4.6

Qgd

Gate-drain charge

Notes:

(1) Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS

increases from 0 to 80% VDSS

Table 7: Switching times

Symbol

Parameter

Test conditions

Min.

Typ.

Max.

Unit

td(on)

Turn-on delay time

VDD = 250 V, ID = 5.5 A

RG = 4.7

Ω, VGS = 10 V (see

Figure 14: "Test circuit for

resistive load switching times"

and Figure 19: "Switching time

waveform")

12.5

Rise time

td(off)

Turn-off-delay time

Fall time

9.8

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