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TNETV2666FIBZWT 数据表(PDF) 183 Page - Texas Instruments |
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TNETV2666FIBZWT 数据表(HTML) 183 Page - Texas Instruments |
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183 / 249 page  Clock Prescale ICPSC PeripheralClock (DSP/18) ICCLKH Generator BitClock ICCLKL Noise Filter SCL ICXSR ICDXR Transmit Transmit Shift Transmit Buffer ICDRR Shift ICRSR Receive Buffer Receive Receive Filter SDA I2CData Noise ICOAR ICSAR Slave Address Control Address Own ICMDR ICCNT Mode Data Count Vector Interrupt Interrupt Status ICIVR ICSTR Mask/Status Interrupt ICIMR Interrupt/DMA I2CModule I2CClock Shadingdenotescontrol/statusregisters. ICEMDR Extended Mode TMS320C6424 www.ti.com SPRS347D – MARCH 2007 – REVISED DECEMBER 2009 6.11 Inter-Integrated Circuit (I2C) The inter-integrated circuit (I2C) module provides an interface between C6424 and other devices compliant with Philips Semiconductors Inter-IC bus (I2C-bus™) specification version 2.1. External components attached to this 2-wire serial bus can transmit/receive up to 8-bit data to/from the DSP through the I2C module. The I2C port does not support CBUS compatible devices. The I2C port supports: • Compatible with Philips I2C Specification Revision 2.1 (January 2000) • Fast Mode up to 400 Kbps (no fail-safe I/O buffers) • Noise Filter to Remove Noise 50 ns or less • Seven- and Ten-Bit Device Addressing Modes • Master (Transmit/Receive) and Slave (Transmit/Receive) Functionality • Events: DMA, Interrupt, or Polling • Slew-Rate Limited Open-Drain Output Buffers Figure 6-20. I2C Module Block Diagram For more detailed information on the I2C peripheral, see the TMS320C642x DSP Peripherals Overview Reference Guide (literature number SPRUEM3). Copyright © 2007–2009, Texas Instruments Incorporated Peripheral Information and Electrical Specifications 183 Submit Documentation Feedback Product Folder Link(s): TMS320C6424 |
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