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STUSB1602 数据表(PDF) 25 Page - STMicroelectronics |
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STUSB1602 数据表(HTML) 25 Page - STMicroelectronics |
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25 / 55 page ![]() DocID028319 Rev 2 25/55 STUSB1602 I2C interface 55 Figure 6. Write operation 5.2 Timing specifications The device uses a standard slave I²C channel at speed up to 400 kHz. Table 14. I²C timing parameters - VDD = 5 V Symbol Parameter Min. Typ. Max. Unit Fscl SCL clock frequency 0 — 400 kHz thd,sta Hold time (repeated) START condition 0.6 — μs tlow LOW period of the SCL clock 1.3 — thigh HIGH period of the SCL clock 0.6 — tsu,dat Setup time for repeated START condition 0.6 — thd,dat Data hold time 0.04 0.9 tsu,dat Data setup time 100 — tr Rise time of both SDA and SCL signals 20 + 0.1 Cb 300 ns tf Fall time of both SDA and SCL signals 20 + 0.1 Cb 300 tsu,sto Setup time for STOP condition 0.6 — μs tbuf Bus free time between a STOP and START condition 1.3 — Cb Capacitive load for each bus line — 400 pF |
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