DocID16487 Rev3

5/8

T12T

Characteristics

8

Figure 7. Non repetitive surge peak on state

current for a sinusoidal

Figure 8. Relative variation of gate trigger

current and gate trigger voltage versus junction

temperature

10

100

1000

0.01

0.10

1.00

10.00

I

T

dI/dt limitation: 50 A/µs

I

TSM

I²t

pulse with width t < 10 ms and corresponding value of I T

p

2

0.0

0.5

1.0

1.5

2.0

2.5

3.0

- 50

-25

0

25

50

75

100

125

V

GT

IQ3

I

typical values

Figure 9. Relative variation of holding current

and latching current versus junction

temperature

Figure 10. Relative variation of critical rate of

decrease of main current versus (dV/dt)c

0.0

0.5

1.0

1.5

2.0

2.5

-50

-25

0

25

50

75

100

125

0.0

0.5

1.0

1.5

2.0

2.5

-50

-25

0

25

50

75

100

125

I

L

I

H

typical values

0

1

2

3

4

5

6

7

25

50

75

100

125

V

typical values

Logic Level and Snubberless types

Figure 11. Relative variation of critical rate of

decrease of main current versus junction

temperature

Figure 12. Leakage current versus junction

temperature for different values of blocking

voltage (typical values)

0

1

2

3

4

5

6

7

8

25

50

75

100

125

1.0E-03

1.0E-02

1.0E-01

1.0E+00

25

50

75

100

125

V

=400 V

V

=600 V

V

=600 V

V

DRM

=200 V

RRM

=V