Application details

L6738A

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Doc ID 18134 Rev 2

a)

of some k

Ω):

b)

c)

d)

e)

Check that compensation network gain is lower than open loop EA gain before

f)

Check phase margin obtained (it should be greater than 45°) and repeat if

necessary.

9.2

Layout guidelines

The L6738A provides control functions and high current integrated drivers to implement

high-current step-down DC-DC converters. In this kind of application, a good layout is very

important.

The first priority when placing components for these applications has to be reserved to the

power section, minimizing the length of each connection and loop as much as possible. To

minimize noise and voltage spikes (EMI and losses) power connections (highlighted in

Figure 11) must be a part of a power plane and realized by wide and thick copper traces:

loop must be minimized. The critical components, i.e. the power MOSFETs, must be close

to one another. The use of a multi-layer printed circuit board is recommended.

placed close to the power section in order to eliminate the stray inductance generated by the

copper traces. Low ESR and ESL capacitors are preferred, MLCCs are recommended to be

connected near the HS drain.

Use a proper number of VIAs when power traces have to move between different planes on

the PCB in order to reduce both parasitic resistance and inductance. Moreover, reproducing

the same high-current trace on more than one PCB layer reduces the parasitic resistance

associated to that connection.

R

F

R

FB

----------

F

0dB

F

LC

------------

∆V

OSC

V

IN

-------------------

⋅

=

C

F

1

π R

F

F

LC

⋅⋅

-----------------------------------

=

C

P

C

F

2

π R

F

C

F

F

ESR

1

–

⋅⋅⋅

-------------------------------------------------------------------

=

R

S

R

FB

F

SW

2F

⋅

LC

--------------------

1

–

------------------------------

=

C

S

1

π R

S

F

SW

⋅⋅

-------------------------------------

=