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L6738ATR 数据表(PDF) 28 Page - STMicroelectronics |
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L6738ATR 数据表(HTML) 28 Page - STMicroelectronics |
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28 / 32 page ![]() Application information L6738A 28/32 Doc ID 18134 Rev 2 therefore in higher ripple voltages. For these reasons, a mix between electrolytic and MLCC capacitors is suggested to minimize ripple as well as reduce voltage deviation in dynamic mode. 10.3 Input capacitors The input capacitor bank is designed considering mainly the input RMS current that depends on the output deliverable current (IOUT) and the duty-cycle (D) for the regulation as follows: The equation reaches its maximum value, IOUT/2, with D = 0.5. The losses depend on the input capacitor ESR and, in the worst case, are: I rms I OUT D1 D – () ⋅ ⋅ = P ESR I OUT 2 ⁄ () 2 ⋅ = |
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