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SPC560B60x 数据表(PDF) 18 Page - STMicroelectronics |
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SPC560B60x 数据表(HTML) 18 Page - STMicroelectronics |
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18 / 133 page ![]() Package pinouts and signal descriptions SPC560B54x/6x 18/133 DocID15131 Rev 9 3.5 Pad types In the device the following types of pads are available for system pins and functional port pins: S = Slow(d) M = Medium(d) (e) F = Fast(d) (e) I = Input only with analog feature(d) J = Input/Output (‘S’ pad) with analog feature X = Oscillator 3.6 System pins The system pins are listed in Table 5. VDD_BV Internal regulator supply voltage 20 24 32 K3 VSS_HV_ADC0 Reference ground and analog ground for the A/D converter 0 (10- bit) 51 73 89 R15 VDD_HV_ADC0 Reference voltage and analog supply for the A/D converter 0 (10- bit) 52 74 90 P14 VSS_HV_ADC1 Reference ground and analog ground for the A/D converter 1 (12- bit) 59 81 98 N12 VDD_HV_ADC1 Reference voltage and analog supply for the A/D converter 1 (12- bit) 60 82 99 K13 1. A decoupling capacitor must be placed between each of the three VDD_LV/VSS_LV supply pairs to ensure stable voltage (see the recommended operating conditions in the device datasheet). Table 4. Voltage supply pin descriptions (continued) Port pin Function Pin number LQFP100 LQFP144 LQFP176 LBGA208 d. See the I/O pad electrical characteristics in the chip datasheet for details. e. All medium and fast pads are in slow configuration by default at reset and can be configured as fast or medium. The only exception is PC[1] which is in medium configuration by default (see the PCR.SRC description in the chip reference manual, Pad Configuration Registers (PCR0–PCR148)). |
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