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STM32L432KB 数据表(PDF) 112 Page - STMicroelectronics |
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STM32L432KB 数据表(HTML) 112 Page - STMicroelectronics |
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112 / 149 page  Electrical characteristics STM32L432KB STM3L432KC 112/149 DocID028798 Rev 2 6 bits 2.5 31.25 220 N/A 6.5 81.25 560 330 12.5 156.25 1200 1000 24.5 306.25 2700 2200 47.5 593.75 3900 3300 92.5 1156.25 8200 6800 247.5 3093.75 18000 15000 640.5 8006.75 50000 50000 1. Guaranteed by design. 2. The I/O analog switch voltage booster is enable when VDDA < 2.4 V (BOOSTEN = 1 in the SYSCFG_CFGR1 when VDDA < 2.4V). It is disable when VDDA ≥ 2.4 V. 3. Fast channels are: PC0, PC1, PC2, PC3, PA0, PA1. 4. Slow channels are: all ADC inputs except the fast channels. Table 62. Maximum ADC RAIN(1)(2) (continued) Resolution Sampling cycle @80 MHz Sampling time [ns] @80 MHz RAIN max (Ω) Fast channels(3) Slow channels(4) |
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