STM32L432KB datasheet(20/149 Pages) STMICROELECTRONICS

20 / 149 page

Functional overview

STM32L432KB STM3L432KC

20/149

DocID028798 Rev 2

Standby mode, supplied by the low-power Regulator (Standby with RAM2 retention

mode).

The device exits Standby mode when an external reset (NRST pin), an IWDG reset,

WKUP pin event (configurable rising or falling edge), or an RTC event occurs (alarm,

periodic wakeup, timestamp, tamper) or a failure is detected on LSE (CSS on LSE).

The system clock after wakeup is MSI up to 8 MHz.

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Shutdown mode

The Shutdown mode allows to achieve the lowest power consumption. The internal

regulator is switched off so that the VCORE domain is powered off. The PLL, the

HSI16, the MSI and the LSI oscillators are also switched off.

The RTC can remain active (Shutdown mode with RTC, Shutdown mode without RTC).

The BOR is not available in Shutdown mode. No power voltage monitoring is possible

in this mode, therefore the switch to Backup domain is not supported.

SRAM1, SRAM2 and register contents are lost except for registers in the Backup

domain.

The device exits Shutdown mode when an external reset (NRST pin), a WKUP pin

event (configurable rising or falling edge), or an RTC event occurs (alarm, periodic

wakeup, timestamp, tamper).

The system clock after wakeup is MSI at 4 MHz.

STM32L432KB 数据表(PDF) 20 Page - STMicroelectronics