DocID10367 Rev 14

7/36

M34E02-F

Description

the bus master acknowledges the receipt of the data byte in the same way. Data transfers

are terminated by a Stop condition after an Ack for WRITE, and after a NoAck for READ.

Figure 2. TSSOP and MLP connections (top view)

1. See Section 8: Package mechanical data for package dimensions, and how to identify pin-1.

Table 1. Signal names

Signal names

Description

E0, E1, E2

Chip Enable

SDA

Serial Data

SCL

Serial Clock

WC

Write Control

Supply voltage

Ground

SDA

SCL

WC

E1

E0

E2

AI09021c

M34E02-F

1

2

3

4

8

7

6

5