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STPMS2 数据表(PDF) 21 Page - STMicroelectronics |
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STPMS2 数据表(HTML) 21 Page - STMicroelectronics |
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21 / 36 page ![]() STPMS2 Theory of operation DocID16525 Rev 5 21/36 LPR (low precision): fCLK = 1 MHz and settings defined by MS0 through MS3 HPR (high precision): the normal mode of operation with fCLK = 2 MHz to 4 MHz The STPMS2 performs operations in 2 basic modes: hard mode and soft mode. In hard mode the configuration is set through external pins MS0, MS1, MS2 and MS3. In soft mode, 40 configuration bits can be accessed through CFG[39:0], via serial communication. The pins used for serial communication are: MS0, MS1 and MS2. Switching between hard and soft mode is achieved through pin MS3. Hard mode: in this case the device configuration is bootstrapped at startup and signals come from VIN and VIP for voltage channels, and CIP and CIN for current channels or from internal BIST DAC. Soft mode: in this mode all possible settings from hard mode are accessible, as well as the additional settings. Figure 17: Block diagram of the modulator The STPMS2 sends selected signals based on the configuration to the DAT and DATn pins. Both outputs have cross-current and slew rate limiters to prevent excessive current spikes on supply lines. |
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