List of figures

STPMS2

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DocID16525 Rev 5

List of figures

Figure 1: STPMS2 internal block diagram ..................................................................................................6

Figure 2: Pin connections ...........................................................................................................................7

Figure 3: Timing diagram ..........................................................................................................................12

Figure 4: Detailed application schematic ..................................................................................................13

Figure 5: Simplified application schematics for the STPMC1 energy metering-based ............................14

Figure 6: Connection schematics for DSP-based applications ................................................................15

Figure 7: VREF/VREF at 25 deg vs. temp................................................................................................17

Figure 8: SNHR of I channel, gain 16x .....................................................................................................17

Figure 9: SNHR of I channel, gain 2x .......................................................................................................17

Figure 10: SNHR of V channel, gain 2x....................................................................................................17

Figure 11: SINAD of I channel, gain 16x (temp. variation) .......................................................................17

Figure 12: SINAD of I channel, gain 2x (temp. variation) .........................................................................17

Figure 13: Relative gain error of I channel, gain 16x ................................................................................18

Figure 14: Relative gain error of I channel, gain 2x ..................................................................................18

Figure 15: Accuracy over dynamic range .................................................................................................18

Figure 16: Power supply external connection scheme .............................................................................20

Figure 17: Block diagram of the modulator...............................................................................................21

Figure 18: Example of sigma-delta modulator output in case of sinusoidal waveform ............................22

Figure 19: Block diagram and definition of DFE digital signals ................................................................23

Figure 20: Timings to switch to soft mode after POR ...............................................................................30

Figure 21: Timings to switch to soft mode ................................................................................................31

Figure 22: QFN16 (4x4 mm) package outline ..........................................................................................33

Figure 23: QFN16 (4x4 mm) recommended footprint...............................................................................34