| 数据搜索系统,热门电子元器件搜索 |
|
L9658 数据表(PDF) 57 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
L9658 数据表(HTML) 57 Page - STMicroelectronics |
|
57 / 64 page ![]() L9658 Functional description Doc ID 14219 Rev 3 57/64 In the auto reply mode where D11 D10 are set to 00,the IC will test every incoming MOSI command, If the command is a write command to a CCRx register then during the following CS_S the device reports back the content of the respective CCRx channel register. If the incoming command is a write to the MCR register for CH1 then in the following CS_S the device reports back the content of the MCR register. If the MOSI command is a write to the CCRx register with bits <11:10> are set to 11 the IC reports the content of the FIFO. MISO bits layout when reporting FIFO data is provided, The MISO layout when reporting configuration report is provided in previous figure. When reporting a configuration report for either the MCR or the CCR register MOSI bits<15:14> are set to 11 to indicate a configuration report. Otherwise they will report the status of the satellite channel. In some cases the user may request a configuration report for either the MCR or CCRx registers without first performing the write operation mentioned above. In this condition if bits <11:10> are set to 01 by the user, device reports the content of the MCR register on the subsequent chip select. If bits <11:10> are set to 10 the IC reports the content of the CCR register. In case of an SPI command to CH2, CH3 or CH4 with bits D11D10 are set to 00 while D14 is set to 0, or if D11D10 are set to 01 with D14 is set to either 0 or 1, the affected channel reports $E000. Bit[12] This Bit is used to Control the write operation for the CCR Register. When it is set to 0 the user can modify bits <D9-D0>, D12 and D13 only, all other CCR bits keep previous setting. When it is set to 1 the user can only modify the following bits D4, D5, D10, D11, D12 and D13, all other CCR bits keep previous setting Bit[13] This Bit is used to Flush FIFO content, when set to 1 the IC flushes the available two FIFO locations for the specified channel, all FIFO connect is lost in this case. Table 41. SPI mode selects reply for satellite channels D11 D10 CH1 CH2 CH3 CH4 00 Reply with CCR1 if D14 is 1 Reply with CCR2 if D14 is 1 Reply with CCR3 if D14 is 1 Reply with CCR4 if D14 is 1 Reply with MCR if D14 is 0 Reply with $E000 if D14 is 0 Reply with $E000 if D14 is 0 Reply with $E000 if D14 is 0 0 1 Reply with MCR Reply with $E000 Reply with $E000 Reply with $E000 1 0 Reply with CCR1 Reply with CCR2 Reply with CCR3 Reply with CCR4 1 1 Report FIFO Report FIFO Report FIFO Report FIFO Table 42. Satellite MISO bits definition 15 14 13 12 11 10 9 87654 3210 M1 M0 P DL FIFO Data |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |