MAS3587F datasheet(5/82 Pages) MICRONAS

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ADVANCE INFORMATION

MAS 3587F

Micronas

MPEG Layer 3 Audio Encoder/Decoder

This data sheet applies to MAS 3587F version A1.

1. Introduction

The MAS 3587F is a single-chip MPEG layer 3 audio

encoder/decoder designed for use in memory-based

recording/playback applications, e.g. MP3 record/play-

back equipment. The IC contains a DSP engine with

embedded RAM and ROM. It provides flexible digital

interfaces for serial and S/PDIF audio data input and

output. Also integrated are power management func-

tions and two DC/DC converters for single cell power

supply. A high-quality stereo D/A converter and a ste-

reo A/D converter on chip provide the analog functions

required in an advanced portable audio player.

In encoding mode, audio data is input via the inte-

grated A/D converter, serial PCM, or S/PDIF interface.

The compressed digital data stream is sent via the par-

allel interface. In decoding mode, compressed digital

data streams are accepted in the parallel or serial for-

mat. The audio data is output via the high quality D/A

converter. A digital output in serial PCM format and/or

S/PDIF format is also provided.

Thus, the MAS 3587F provides a true ’ALL-IN-ONE’

solution that is ideally suited for highly optimized mem-

ory based music recorders.

Additional functionality is achieved via download soft-

ware (e.g. Micronas SC4 encoder/decoder). SC4 is a

proprietary Micronas speech codec technology based

on ADPCM. The codec can be downloaded to the

MAS 3587F to allow high quality speech recording and

playing back at various sampling rates. (Please con-

tact your local Micronas Sales Representative about

availability of SC4 downloads).

In MPEG 1 (ISO 11172-3), three hierarchical layers of

compression have been standardized. The most

sophisticated and complex, layer 3, allows compres-

sion rates of approximately 12:1 for mono and stereo

signals while still maintaining CD audio quality.

1.1. Features

Firmware

– MPEG 1/2 layer 3 encoder

– Encoding with adaptive bit rate up to max. 192 kbit/s

– MPEG 1/2 layer 2 and layer 3 decoder

– Decoder-Extension to MPEG 2 layer 3 for low bit

rates (“MPEG 2.5”)

– Extraction of MPEG Ancillary Data

– Adaptive bit rates (bit rate switching)

– SDMI-compliant security technology for decoder

– Stereo channel mixer

– Bass, treble and loudness function

– Micronas Dynamic Bass (MDB)

– Automatic Volume Control (AVC)

Interfaces

– 2 serial asynchronous interfaces for bitstreams and

uncompressed digital audio

– Parallel handshake bit stream input/output

– Serial audio output via I2S and related formats

– S/PDIF audio input

– S/PDIF audio output

– Controlling via I2C interface

Hardware Features

– Two independent embedded DC/DC converters

(e.g. for DSP and flash RAM supply)

– Low DC/DC converter start-up voltage (0.9 V)

– DC converter efficiency up to 95 %

– Battery voltage monitor

– Low supply voltage (down to 2.2 V for decoder,

3.5 V for encoder)

– Low power dissipation (<70 mW for decoder,

<400 mW for encoder)

– Hardware power management and power-off func-

tions

– Microphone amplifier

– Stereo A/D converter for FM/AM-radio and speech

input

– CD quality stereo D/A converter

– Headphone amplifier

– On-chip crystal oscillator

– External clock or crystal frequency of 13...20 MHz

– Standby current < 10 µA

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