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MAS3587F 数据表(PDF) 71 Page - Micronas |
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MAS3587F 数据表(HTML) 71 Page - Micronas |
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71 / 82 page ![]() ADVANCE INFORMATION MAS 3587F Micronas 71 4.6.3.7. PIO as Parallel Output Interface: DMA Mode In encoding mode, the MAS 3587F signals available data by setting the EOD pin to ”high”. After verifying this, the controller signalizes its capability to receive one byte of data by activating the PR line. The MAS 3587F responds by setting the RTW line to the “low” level when the actual byte is set on the data lines PI[19:12]. After PR is set to “low” level, the RTW line is set to “high” again. The next data word write operation will be initialized again by setting the PR line via the controller. Please refer to Fig. 4–27 on page 71 for the exact timing. The procedure above will be repeated until the MAS 3587F sets the EOD signal to “0” which indicates that the transfer of one data block has been executed. Subsequently, the controller should set PR to “0”, wait until EOD rises again and then repeat the procedure to receive the next block of data. The DMA buffer is 15 bytes long. The buffer size is subject to change in the next version. In order to transfer the worst case data rate of 192 kbit/s, the controller must react sufficiently fast. The mean response times (t0, t3, t5) must be faster than 10 ms. Due to internal buffering in the MAS 3587F, this time can be expanded up to 4.8 ms once within each frame (see Table 2–2 on page 15) in any case. Fig. 4–27: Handshake protocol for reading MPEG data from the PIO-DMA Table 4–5: PIO output mode timing Symbol Pin Min. Max. Unit t0 EOD, PR 0.010 2000 µs t1 PR, PI 110 310 ns t2 PI, RTW 18 55 ns t3 RTW, PR 18 ns t4 PR, RTW 90 260 ns t5 RTW, PR 35 ns teod tbd tbd ns teodq 2.5 ns EOD PR RTW PI[19:12] high low high low high low high low t0 t3 t2 teodq teod Byte 15 Byte 1 t4 t5 t1 |
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