Functional description

ST8034T, ST8034AT, ST8034P, ST8034C

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DocID024587 Rev 4

If the CMDVCC pin is high for more than 15 ms but less than 30 ms

If the CMDVCC pin is high for more than 30 ms (card inactive), and if the card needs to be

activated at 3 V, the sequence shown in Figure 18 applies: the CMDVCC pin must be set

6.10.2

For the ST8034P device, a 1.8 V card supply feature was added and all the 5 V, 3 V or 1.8 V

a tristate mode, see Table 14. To define a logic level in the case of the “left-floating” state, an

internal resistor divider (285 + 285 k

overcurrent condition and deactivation due to an attempt to step change the voltage on the

6.11

Chip select (ST8034C only)

The chip select (CS) input is active high, meaning normal operation when the CS input is in

logic high state. When the CS pin goes low, the status of the ST8034C device is frozen

(i.e. the status of control inputs RSTIN and CMDVCC is latched) and the I/OUC pin on the

microcontroller interface goes into a high impedance mode (with pull-up resistor to

a high impedance mode. This allows the microcontroller interface pins to be shared among

multiple smartcard interfaces connected in parallel. The status and all the ST8034C device

functions (including the card) are maintained for immediate use when the CS goes high

again. For this reason CLKIN clock input is not affected by the chip select, the clock is

provided to the ST8034C device and to the card even when the CS is low.

VCC_SEL pin level

VCC output (card supply) voltage [V]

High

5

Low

3

Floating

1.8