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R5F104FAD 数据表(PDF) 121 Page - Renesas Technology Corp

部件名 R5F104FAD
功能描述  True Low Power Platform
PDF  213 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

R5F104FAD 数据表(HTML) 121 Page - Renesas Technology Corp

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RL78/G14
2. ELECTRICAL SPECIFICATIONS (TA = -40 to +85
°C)
R01DS0053EJ0330 Rev. 3.30
Page 121 of 208
Aug 12, 2016
2.6.6
LVD circuit characteristics
(1)
Reset Mode and Interrupt Mode
(TA = -40 to +85°C, VPDR
≤ VDD ≤ 5.5 V, VSS = 0 V)
Parameter
Symbol
Conditions
MIN.
TYP.
MAX.
Unit
Voltage
detection
threshold
Supply voltage level
VLVD0
Rising edge
3.98
4.06
4.14
V
Falling edge
3.90
3.98
4.06
V
VLVD1
Rising edge
3.68
3.75
3.82
V
Falling edge
3.60
3.67
3.74
V
VLVD2
Rising edge
3.07
3.13
3.19
V
Falling edge
3.00
3.06
3.12
V
VLVD3
Rising edge
2.96
3.02
3.08
V
Falling edge
2.90
2.96
3.02
V
VLVD4
Rising edge
2.86
2.92
2.97
V
Falling edge
2.80
2.86
2.91
V
VLVD5
Rising edge
2.76
2.81
2.87
V
Falling edge
2.70
2.75
2.81
V
VLVD6
Rising edge
2.66
2.71
2.76
V
Falling edge
2.60
2.65
2.70
V
VLVD7
Rising edge
2.56
2.61
2.66
V
Falling edge
2.50
2.55
2.60
V
VLVD8
Rising edge
2.45
2.50
2.55
V
Falling edge
2.40
2.45
2.50
V
VLVD9
Rising edge
2.05
2.09
2.13
V
Falling edge
2.00
2.04
2.08
V
VLVD10
Rising edge
1.94
1.98
2.02
V
Falling edge
1.90
1.94
1.98
V
VLVD11
Rising edge
1.84
1.88
1.91
V
Falling edge
1.80
1.84
1.87
V
VLVD12
Rising edge
1.74
1.77
1.81
V
Falling edge
1.70
1.73
1.77
V
VLVD13
Rising edge
1.64
1.67
1.70
V
Falling edge
1.60
1.63
1.66
V
Minimum pulse width
tLW
300
μs
Detection delay time
300
μs



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