R5F100GL datasheet(86/202 Pages) RENESAS

86 / 202 page

RL78/G13

2. ELECTRICAL SPECIFICATIONS (TA = -40 to +85

C)

Page 86 of 196

R01DS0131EJ0330 Rev.3.30

Mar 31, 2016

(4) During communication at same potential (CSI mode) (slave mode, SCKp... external clock input) (2/2)

(TA =

40 to +85C, 1.6 V  EVDD0 = EVDD1  VDD  5.5 V, VSS = EVSS0 = EVSS1 = 0 V)

HS (high-speed

main) Mode

LS (low-speed main)

Mode

LV (low-voltage main)

Mode

Parameter

Symbo

Conditions

MIN.

MAX.

MIN.

MAX.

MIN.

MAX.

Unit

2.7 V

 EVDD0  5.5 V

1/fMCK+2

1/fMCK+30

1.8 V

 EVDD0  5.5 V

1/fMCK+3

1/fMCK+30

1.7 V

 EVDD0  5.5 V

1/fMCK+4

1/fMCK+40

SIp setup time

(to SCKp

) Note 1

tSIK2

1.6 V

 EVDD0  5.5 V



1/fMCK+40

1.8 V

 EVDD0  5.5 V

1/fMCK+3

1/fMCK+31

1.7 V

 EVDD0  5.5 V

1/fMCK+

250

1/fMCK+

250

1/fMCK+

250

SIp hold time

(from SCKp

)

Note 2

tKSI2

1.6 V

 EVDD0  5.5 V



1/fMCK+

250

1/fMCK+

250

2.7 V

 EVDD0  5.5

2/fMCK+

110

2/fMCK+

110

2.4 V

 EVDD0  5.5

2/fMCK+

110

2/fMCK+

110

1.8 V

 EVDD0  5.5

2/fMCK+

110

2/fMCK+

110

2/fMCK+

110

1.7 V

 EVDD0  5.5

2/fMCK+

220

2/fMCK+

220

2/fMCK+

220

Delay time

from SCKp

 to

SOp output

Note

tKSO2

C = 30

Note 4

1.6 V

 EVDD0  5.5



2/fMCK+

220

2/fMCK+

220

Notes 1. When DAPmn = 0 and CKPmn = 0, or DAPmn = 1 and CKPmn = 1. The SIp setup time becomes “to

SCKp

” when DAPmn = 0 and CKPmn = 1, or DAPmn = 1 and CKPmn = 0.

2. When DAPmn = 0 and CKPmn = 0, or DAPmn = 1 and CKPmn = 1. The SIp hold time becomes “from

SCKp

” when DAPmn = 0 and CKPmn = 1, or DAPmn = 1 and CKPmn = 0.

3. When DAPmn = 0 and CKPmn = 0, or DAPmn = 1 and CKPmn = 1. The delay time to SOp output

becomes “from SCKp

” when DAPmn = 0 and CKPmn = 1, or DAPmn = 1 and CKPmn = 0.

4. C is the load capacitance of the SOp output lines.

5. Transfer rate in the SNOOZE mode: MAX. 1 Mbps

Caution

Select the normal input buffer for the SIp pin and SCKp pin and the normal output mode for the

SOp pin by using port input mode register g (PIMg) and port output mode register g (POMg).

Remarks 1.

p: CSI number (p = 00, 01, 10, 11, 20, 21, 30, 31), m: Unit number (m = 0, 1),

n: Channel number (n = 0 to 3), g: PIM number (g = 0, 1, 4, 5, 8, 14)

fMCK: Serial array unit operation clock frequency

(Operation clock to be set by the CKSmn bit of serial mode register mn (SMRmn). m: Unit number,

n: Channel number (mn = 00 to 03, 10 to 13))

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