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TSZ182 数据表(PDF) 22 Page - STMicroelectronics |
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TSZ182 数据表(HTML) 22 Page - STMicroelectronics |
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22 / 39 page ![]() Application information TSZ182 22/39 DocID029836 Rev 1 5.5 Input offset voltage drift over temperature The maximum input voltage drift variation over temperature is defined as the offset variation related to the offset value measured at 25 °C. The operational amplifier is one of the main circuits of the signal conditioning chain, and the amplifier input offset is a major contributor to the chain accuracy. The signal chain accuracy at 25 °C can be compensated during production at application level. The maximum input voltage drift over temperature enables the system designer to anticipate the effect of temperature variations. The maximum input voltage drift over temperature is computed using Equation 1. Equation 1 Where T = -40 °C and 125 °C. The TSZ182 datasheet maximum value is guaranteed by measurements on a representative sample size ensuring a Cpk (process capability index) greater than 1.3. 5.6 Capacitive load Driving large capacitive loads can cause stability problems. Increasing the load capacitance produces gain peaking in the frequency response, with overshoot and ringing in the step response. It is usually considered that with a gain peaking higher than 2.3 dB an op amp might become unstable. Generally, the unity gain configuration is the worst case for stability and the ability to drive large capacitive loads. Figure 51: "Stability criteria with a serial resistor at VCC = 5 V", Figure 52: "Stability criteria with a serial resistor at VCC = 3.3 V", and Figure 53: "Stability criteria with a serial resistor at VCC = 2.2 V" show the serial resistors that must be added to the output, to make a system stable. Figure 54: "Test configuration for Riso" shows the test configuration using an isolation resistor, Riso. Figure 51: Stability criteria with a serial resistor at VCC = 5 V ∆V io ∆T ma x V io T V io 25 – T 25 °C – = °C |
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