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HT82B40A 数据表(PDF) 23 Page - Holtek Semiconductor Inc |
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HT82B40A 数据表(HTML) 23 Page - Holtek Semiconductor Inc |
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23 / 54 page ![]() HT82B40R/HT82B40A Rev. 1.70 23 November 5, 2014 Programming Considerations By disabling the interrupt enable bits, a requested inter- rupt can be prevented from being serviced, however, once an interrupt request flag is set, it will remain in this condition in the interrupt control register until the corre- sponding interrupt is serviced or until the request flag is cleared by a software instruction. It is recommended that programs do not use the ²CALL subroutine ² instruction within the interrupt subroutine. Interrupts often occur in an unpredictable manner or need to be serviced immediately in some applications. If only one stack is left and the interrupt is not well con- trolled, the original control sequence will be damaged once a ²CALL subroutine² is executed in the interrupt subroutine. All of these interrupts have the capability of waking up the processor when in the Power Down Mode. Only the Program Counter is pushed onto the stack. If the contents of the accumulator or status register are al- tered by the interrupt service program, which may cor- rupt the desired control sequence, then the contents should be saved in advance. USB Interrupt The USB interrupts are triggered by the following USB events causing the related interrupt request flag, USBF, to be set. · Access of the corresponding USB FIFO from PC · A USB suspend signal from the PC · A USB resume signal from the PC · A USB Reset signal When the interrupt is enabled, the stack is not full and the USB interrupt is active, a subroutine call to location 04H will occur. The interrupt request flag, USBF, and the EMI bit will be cleared to disable other interrupts. When the PC Host accesses the FIFO of the device, the corresponding request bit, USR, is set, and a USB inter- rupt is triggered. So the user can easy determine which FIFO has been accessed. When the interrupt has been served, the corresponding bit should be cleared by firm- ware. When the device receive a USB Suspend signal from Host PC, the suspend line (bit0 of USC) is set and a USB interrupt is also triggered. Also when device receive a Resume signal from Host PC, the resume line (bit3 of USC) is set and a USB inter- rupt is triggered. Reset and Initialisation A reset function is a fundamental part of any microcontroller ensuring that the device can be set to some predetermined condition irrespective of outside parameters. The most important reset condition is after power is first applied to the microcontroller. In this case, internal circuitry will ensure that the microcontroller, af- ter a short delay, will be in a well defined state and ready to execute the first program instruction. After this power-on reset, certain important internal registers will be set to defined states before the program com- mences. One of these registers is the Program Counter, which will be reset to zero forcing the microcontroller to begin program execution from the lowest Program Memory address. In addition to the power-on reset, situations may arise where it is necessary to forcefully apply a reset condition when the microcontroller is running. One example of this is where after power has been applied and the microcontroller is already running, the RES line is force- fully pulled low. In such a case, known as a normal oper- ation reset, some of the microcontroller registers remain unchanged allowing the microcontroller to proceed with normal operation after the reset line is allowed to return high. Another type of reset is when the Watchdog Timer overflows and resets the microcontroller. All types of re- set operations result in different register conditions be- ing setup. Another reset exists in the form of a Low Voltage Reset, LVR, where a full reset, similar to the RES reset is imple- mented in situations where the power supply voltage falls below a certain threshold. Reset Functions There are five ways in which a microcontroller reset can occur, through events occurring both internally and ex- ternally: · Power-on Reset The most fundamental and unavoidable reset is the one that occurs after power is first applied to the microcontroller. As well as ensuring that the Program Memory begins execution from the first memory ad- dress, a power-on reset also ensures that certain other registers are preset to known conditions. All the I/O port and port control registers will power up in a high condition ensuring that all pins will be first set to inputs. Although the microcontroller has an internal RC reset function, if the VDD power supply rise time is not fast enough or does not stabilise quickly at power-on, the internal reset function may be incapable of providing a proper reset operation. In such cases it is recom- mended that an external RC network is connected to the RES pin, whose additional time delay will ensure that the RES pin remains low for an extended period to allow the power supply to stabilise. During this time delay, normal operation of the microcontroller will be inhibited. After the RES line reaches a certain voltage value, the reset delay time tRSTD is invoked to provide an extra delay time after which the microcontroller will begin normal operation. The abbreviation SST in the figures stands for System Start-up Timer. |
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