9

Integrated

Circuit

Systems, Inc.

ICS954119

Advance Information

0875—05/24/04

I

Bit 7

M/N_EN

PLL1 M/N

Programming Enable

RW

0

Bit 6

Reserved

Reserved

RW

0

Bit 5

WD Safe Freq Source

WD Safe Freq Source

RW

0

Bit 4

WD SF4

RW

0

Bit 3

WD SF3

RW

0

Bit 2

WD SF2

RW

0

Bit 1

WD SF1

RW

0

Bit 0

WD SF0

RW

0

I

Bit 7

N Div8

N Divider Prog bit 8

RW

X

Bit 6

N Div9

N Divider Prog bit 9

RW

X

Bit 5

M Div5

RW

X

Bit 4

M Div4

RW

X

Bit 3

M Div3

RW

X

Bit 2

M Div2

RW

X

Bit 1

M Div1

RW

X

Bit 0

M Div0

RW

X

I

Bit 7

N Div7

RW

X

Bit 6

N Div6

RW

X

Bit 5

N Div5

RW

X

Bit 4

N Div4

RW

X

Bit 3

N Div3

RW

X

Bit 2

N Div2

RW

X

Bit 1

N Div1

RW

X

Bit 0

N Div0

RW

X

I

Bit 7

SSP7

RW

X

Bit 6

SSP6

RW

X

Bit 5

SSP5

RW

X

Bit 4

SSP4

RW

X

Bit 3

SSP3

RW

X

Bit 2

SSP2

RW

X

Bit 1

SSP1

RW

X

Bit 0

SSP0

RW

X

I

Bit 7

Reserved

Reserved

R

0

Bit 6

SSP14

RW

X

Bit 5

SSP13

RW

X

Bit 4

SSP12

RW

X

Bit 3

SSP11

RW

X

Bit 2

SSP10

RW

X

Bit 1

SSP9

RW

X

Bit 0

SSP8

RW

X

-

-

-

--

-

Spread Spectrum

Programming bit(14:8)

These Spread Spectrum bits in Byte 13 and 14 will program the

spread pecentage of PLL1

-

-

-

-

Type

0

1

PWD

Byte 14

Pin #

Name

Control Function

-

Spread Spectrum

Programming bit(7:0)

These Spread Spectrum bits in Byte 13 and 14 will program the

spread pecentage of PLL1

-

-

-

-

-

-

-

Type

0

1

PWD

Byte 13

Pin #

Name

Control Function

-

N Divider Programming

Byte12 bit(7:0) and

Byte11 bit(7:6)

The decimal representation of M and N Divier in Byte 11 and 12

will configure the PLL1 VCO frequency. Default at power up =

latch-in or Byte 0 Rom table. VCO Frequency = 14.318 x

[NDiv(9:0)+8] / [MDiv(5:0)+2]

-

-

-

-

-

-

-

Type

0

1

PWD

Byte 12

Pin #

Name

Control Function

-

The decimal representation of M and N Divier in Byte 11 and 12

will configure the PLL1 VCO frequency. Default at power up =

latch-in or Byte 0 Rom table. VCO Frequency = 14.318 x

[NDiv(9:0)+8] / [MDiv(5:0)+2]

-

-

M Divider Programming

bit (5:0)

-

-

-

-

-

Type

0

1

PWD

Byte 11

Pin #

Name

Control Function

-

B10b(4:0)

Latch Inputs

-

Watch Dog Safe Freq

Programming bits

Writing to these bit will configure the safe frequency as Byte0 bit

(4:0).

-

-

-

-

-

Disable

Enable

-

--

Type

0

1

PWD

Byte 10

Pin #

Name

Control Function