2004 November 8

7

LPC2124

Philips Semiconductors

Single Chip 32-bit Microcontroller

Erratasheet

Affected features:

1. Interrupt on Match for Timer0/1.

2. Interrupt on Capture for Timer0/1.

3. These same features will be affected when using PWM.

Workaround:

There is no clear workaround for this problem but some of the below mentioned solutions could

work with some applications.

Possible workarounds for Match functionality:

1. If the application only needs two Match registers then distribute them between Timer 0 and

Timer 1 to avoid this problem

2. Stop the timer before accessing the Interrupt register for clearing the interrupt and then start timer

again after the access is completed.

3. Polling for interrupt: Supposing that there are two Match events (Match X and Match Y). At the

end of the Interrupt Service Routine (ISR) for Match X, compare the Timer Counter value with the

Match Register Y value. If the Timer Counter value is more than the Match Register Y value then

it is possible that this event might have been missed. In this case jump to the ISR directly and

service Match event Y.

Possible workarounds for Capture functionality:

1. Try to spread the capture events between both timers if there are two capture events. If the

application also has a match event then one of the capture events may suffer

2. Polling for Capture: At the end of a Match interrupt ISR or Capture event ISR compare the

previous Capture value with the current Capture value. If the Capture value has changed then

the Capture event might have been missed. In this case, jump to the ISR directly and service the

Capture event.

The same above workarounds will also be applicable for the Match and Compare functionality of

the PWM block.

Core.1

Incorrect update of the Abort Link register in Thumb state

Introduction:

If the processor is in Thumb state and executing the code sequence STR, STMIA or PUSH followed

by a PCrelative load, and the STR, STMIA or PUSH is aborted, the PC is saved to the abort link

register.

Problem:

In this situation the PC is saved to the abort link register in word resolution, instead of half-word

resolution.

Conditions:

The processor must be in Thumb state, and the following sequence must occur:

<any instruction>

<STR, STMIA, PUSH> <---- data abort on this instruction