Table 2. Format for Send-Byte Data

Send-Byte Format

Serial-to-Parallel/Parallel-to-Serial Converters and

Load-Switch Controllers with SMBus Interface

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7

ADDRESS

WRITE

ACK

DATA

ACK

START

CONDITION

7 bits

1 bit

(low)

1 bit

(low)

8 bits

1 bit

(low)

STOP

CONDITION

Shaded = Slave Transmission

SMBCLK

I/O

A

B

C

D

E

F

G

H

I

J

K

SMBDATA

A = START CONDITION

B = MSB OF ADDRESS CLOCKED INTO SLAVE

C = LSB OF ADDRESS CLOCKED INTO SLAVE

D = R/W BIT CLOCKED INTO SLAVE

E = SLAVE PULLS SMBDATA LINE LOW

L

M

F = ACKNOWLEDGE BIT CLOCKED INTO MASTER

G = MSB OF DATA CLOCKED INTO SLAVE (OP/SUS BIT)

H = LSB OF DATA CLOCKED INTO SLAVE

I = SLAVE PULLS SMBDATA LINE LOW

J = ACKNOWLEDGE CLOCKED INTO MASTER

K = ACKNOWLEDGE CLOCK PULSE

L = STOP CONDITION, DATA EXECUTED BY SLAVE

M = NEW START CONDITION

Figure 2a. SMBus Send-Byte Timing Diagram and Format

BIT

NAME

POR STATE*

(MAX1661)

POR STATE*

(MAX1662/MAX1663)

FUNCTION

7 (MSB)

SELECT

N/A

N/A

Writes data to normal register when high; writes data to suspend

register when low.

6

Mask SS

1

1

Masks START-STOP software interrupts when high.

5

Mask 3

1

1

Masks I/O3 interrupts when high.

4

Mask 2

1

1

Masks I/O2 interrupts when high.

3

Mask 1

1

1

Masks I/O1 interrupts when high.

2

I/O3

0

1

I/O output enable bit. I/O3 is on when this bit is low (low state).

1

I/O2

0

1

I/O output enable bit. I/O2 is on when this bit is low (low state).

0

I/O1

0

1

I/O output enable bit. I/O1 is on when this bit is low (low state).

*

Note: POR states apply to both suspend- and normal-mode registers.

current I/O pin states (i.e., they are not latched). There

is a 15µs data-setup time requirement, due to the slow

level translators needed for high-voltage (28V) opera-

tion. Data-hold time is zero.

Interrupts

The MAX1661/MAX1662/MAX1663 generate interrupts

(hardware and software) whenever the logic states of

the I/O pins change or when thermal shutdown occurs.

Interrupts are signaled with the hardware ALERT pin