THS1040

SLAS290C − OCTOBER 2001 − REVISED OCTOBER 2004

17

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PRINCIPLES OF OPERATION

Sample

and

Hold

X1

X−1

ADC

Core

AIN+

AIN−

Internal

Reference

Buffer

VREF

AGND

AVDD + VREF

2

AVDD − VREF

2

connected to the REFT and REFB pins and its inputs are connected to pins VREF and AGND. The resulting

voltages at REFT and REFB are:

REFT

+

AV

DD )

VREF

2

REFB

+

AV

DD *

VREF

2

Depending on the connection of the REFSENSE pin, the voltage on VREF may be driven by an off-chip source

or by the internal bandgap reference A1 (see onboard reference generator) to match the THS1040 input range

to their application requirements.

as a bias reference for ac coupling networks connecting the signal sources to the AIN+ or AIN− inputs. This

removes the need for the user to provide a stabilized external bias reference.

(7)

(8)