THS1040

SLAS290C − OCTOBER 2001 − REVISED OCTOBER 2004

26

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APPLICATION INFORMATION

driving the VREF pin (continued)

Note that the maximum current may be up to 30% higher. The user should ensure that VREF is driven from a

driving REFT and REFB (external ADC references, MODE = AGND)

AVDD

AGND

AVDD

AGND

2 k

Ω

REFT

REFB

To ADC Core

To ADC Core

Figure 36. Equivalent Circuit of REFT and REFB Inputs

reference decoupling

VREF pin

When the on-chip reference generator is enabled, the VREF pin should be decoupled to the circuit board’s

analog ground plane close to the THS1040 AGND pin via a 1-

µF capacitor and a 0.1-µF ceramic capacitor.

REFT and REFB pins

In any mode of operation, the REFT and REFB pins should be decoupled as shown in Figure 37. Use short

board traces between the THS1040 and the capacitors to minimize parasitic inductance.

THS1040

REFT

REFB

0.1

µF

10

µF

0.1

µF

0.1

µF

Figure 37. Recommended Decoupling for the ADC Reference Pins REFT and REFB

BIASREF pin

When using the on-chip BIASREF source, the BIASREF pin should be decoupled to the circuit board’s analog

ground plane close to the THS1040 AGND pin via a 1-

µF capacitor and a 0.1-µF ceramic capacitor.