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AD6676 数据表(PDF) 78 Page - Analog Devices

部件名 AD6676
功能描述  Wideband IF Receiver Subsystem
PDF  90 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD6676 数据表(HTML) 78 Page - Analog Devices

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AD6676
Data Sheet
Rev. D | Page 78 of 90
AGC Flag Enable Register
Address: 0x19E, Reset: 0x00, Name: EN_FLAG
Table 86. Bit Descriptions for EN_FLAG
Bits
Bit Name
Description
Reset
Access
[7:5]
RESERVED
0x0
RW
4
EN_OR
Combine ADC reset with peak detect. When asserted, this bit causes
the ADC reset pulse (Flag Select Option 0) to be logically OR-ed with
one of the peak-detect flags options specified in Register 0x19B or
Register 0x19C.
0x0
RW
[3:2]
RESERVED
0x0
RW
1
EN_FLAG1
Enable Flag 1.
0x0
RW
0 = Force AGC4 pin low.
1 = Enable selected flag on AGC4 pin (see FLAG1_SEL).
0
EN_FLAG0
Enable Flag 0.
0x0
RW
0 = Force AGC3 pin low.
1 = Enable selected flag on AGC3 pin (see FLAG0_SEL).
Force GPIO Register
Address: 0x1B0, Reset: 0x00, Name: FORCE_GPIO
Table 87. Bit Descriptions for FORCE_GPIO
Bits
Bit Name
Description
Reset
Access
[7:4]
RESERVED
0x0
RW
[3:0]
FORCE_GPIO
Force GPIO use. Force one or more of the pins, AGC1 to AGC4, to be used as a GPIO rather than
any other specified use.
0x00
RW
Bit 0: force AGC1 to be used as a GPIO.
Bit 1: force AGC2 to be used as a GPIO.
Bit 2: force AGC3 to be used as a GPIO.
Bit 3: force AGC4 to be used as a GPIO.
Force GPIO as Output Register
Address: 0x1B1, Reset: 0x00, Name: FORCE_GPIO_OUT
Table 88. Bit Descriptions for FORCE_GPIO_OUT
Bits
Bit Name
Description
Reset
Access
[7:4]
RESERVED
0x0
RW
[3:0]
FORCE_GPIO_OUT
Force GPIO use as an output. When used in conjunction with FORCE_GPIO, configure
one or more of the pins, AGC1 to AGC4, to be used as a general purpose output or input.
0x00
RW
Bit 0 = 1: use AGC1 as an output.
Bit 0 = 0: use AGC1 as an input.
Bit 1 = 1: use AGC2 as an output.
Bit 1 = 0: use AGC2 as an input.
Bit 2 = 1: use AGC3 as an output.
Bit 2 = 0: use AGC3 as an input.
Bit 3 = 1: use AGC4 as an output.
Bit 3 = 0: use AGC4 as an input.



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