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AD6676 数据表(PDF) 82 Page - Analog Devices

部件名 AD6676
功能描述  Wideband IF Receiver Subsystem
PDF  90 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

AD6676 数据表(HTML) 82 Page - Analog Devices

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AD6676
Data Sheet
Rev. D | Page 82 of 90
Swap Register
Address: 0x1E1, Reset: 0x00, Name: SWAP
Table 106. Bit Descriptions for SWAP
Bits
Bit Name
Settings
Description
Reset
Access
[7:6]
RESERVED
0x0
RW
[5:4]
SWAP_CONV
Bit [4] swaps the source of Framer Converter 0 (default is I channel).
0x0
RW
Bit [5] swaps the source of Framer Converter 1 (default is Q channel).
00
Framer Input 1 = Q channel; Framer Input 0 = I channel
01
Framer Input 1 = Q channel; Framer Input 0 = Q channel
10
Framer Input 1 = I channel; Framer Input 0 = I channel
11
Framer Input 1 = I channel; Framer Input 0 = Q channel
[3:2]
RESERVED
0x0
RW
[1:0]
SWAP_LANE
Bit [0] swaps the source of physical output lane 0.
0x0
RW
Bit [1] swaps the source of physical output lane 1.
00
Output Lane 1 = Famer lane 1; Output Lane 0 = Framer Lane 0
01
Output Lane 1 = Framer lane 1; Output Lane 0 = Framer Lane 1
10
Output Lane 1 = Framer lane 0; Output Lane 0 = Framer Lane 0
11
Output Lane 1 = Framer lane 0; Output Lane 0 = Framer Lane 1
Link/Lane Power-Down Register
Address: 0x1E2, Reset: 0x00, Name: LANE_PD
Table 107. Bit Descriptions for LANE_PD
Bits
Bit Name
Description
Reset
Access
[7:4]
ILAS_DELAY
ILAS Start Delay. Usually the ILAS starts on the first LMFC rising edge after
SYNCINB goes high. This value delays the ILAS by the given number of LMFC
periods (multiframe periods).
0x0
RW
[3:2]
RESERVED
0x0
RW
[1:0]
LANE_PD
Lane Power-down.
0x0
RW
Bit 0 powers down transmitter PHY for Lane 0.
Bit 1 powers down transmitter PHY for Lane 1.
Interface Control 0 Register
Address: 0x1E3, Reset: 0x14, Name: MIS1
Table 108. Bit Descriptions for MIS1
Bits
Bit Name
Description
Reset
Access
[7:6]
RESERVED
0x0
RW
5
TEST_SAMPLE_EN
0 = Disable transport layer test samples.
0x0
RW
1 = Enable transport layer test samples.
4
LSYNC_EN
0 = Disable lane synchronization.
0x1
RW
1 = Enable lane synchronization (default).
[3:2]
ILAS_MODE
01 = Enable ILAS (default).
0x1
RW
11 = ILAS always on; data link layer test mode.
1
FACI_DISABLE
Control of Frame Alignment Characters.
0x0
RW
0 = Enable frame alignment character insertion.
1 = Disable frame alignment character insertion.
0
RESERVED
0x0
RW



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