AD9993BBCZ datasheet(43/57 Pages) AD

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AD9993

Data Sheet

Rev. A | Page 42 of 56

DAC CORES CONTROL REGISTER

Address: 0x039, Reset: 0x02, Name: DAC_CTRL

Table 36. Bit Descriptions for DAC_CTRL

Bits

Bit Name

Description

Reset

Access

DAC_TRANS

DAC input latch data transfer method select.

0x0

0 = edge triggered.

1 = level triggered.

[6:4]

DAC_VCM_VREF_BIT

Sets DAC common-mode level.

0x0

000 = 0.0 V.

001 = 0.2 V.

010 = 0.3 V.

011 = 0.4 V

100 = 0.5 V

101 = 0.6 V

110 = 0.7 V.

111 = 0.8 V.

DAC_RSET_EN

Selects on-chip RFSADJ_x resistor.

0x1

DAC_REF_EXT

Selects external DAC Reference voltage. Set to 1 to use an off-chip DAC

reference.

0x0

DAC DATAPATH FORMAT CONTROL REGISTER

Address: 0x03A, Reset: 0x00, Name: DAC_DP_FMT

Table 37. Bit Descriptions for DAC_DP_FMT

Bits

Bit Name

Description

Reset

Access

DAC_BINARY

Enable binary offset data format (default is twos complement).

0x0

0 = twos complement.

1 = binary offset.

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