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AD7262BSTZ 数据表(PDF) 5 Page - Analog Devices |
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AD7262BSTZ 数据表(HTML) 5 Page - Analog Devices |
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5 / 33 page  AD7262 Data Sheet Rev. B | Page 4 of 32 Parameter Min Typ Max Unit Test Conditions/Comments LOGIC INPUTS Input High Voltage, VINH 0.7 × VDRIVE V Input Low Voltage, VINL 0.8 V Input Current, IIN ±1 µA VIN = 0 V or VDRIVE Input Capacitance, CIN3 4 pF LOGIC OUTPUTS Output High Voltage, VOH VDRIVE − 0.2 V Output Low Voltage, VOL 0.4 V Floating State Leakage Current ±1 µA Floating State Output Capacitance3 5 pF Output Coding Twos complement CONVERSION RATE Conversion Time 19 × tSCLK ns Track-and-Hold Acquisition Time 400 ns Throughput Rate 1 MSPS AD7262 500 kSPS AD7262-5 COMPARATORS Input Offset Comparator A and Comparator B ±2 ±4 mV TA = 25°C to 105°C only Comparator C and Comparator D ±2 ±4 mV Offset Voltage Drift 0.5 μV/°C All comparators Input Common-Mode Range3 0 to 4 V CA_CBVCC = 5 V 0 to 1.7 V CA_CBVCC = 2.7 V Input Capacitance3 4 pF Input Impedance3 1 GΩ IDD Normal Mode (Static)6 25 pF load, COUTx = 0 V, VCM = AVCC/2, VOVERDRIVE = 200 mV differential Comparator A and Comparator B 3 µA CA_CBVCC = 3.3 V 6 8.5 µA CA_CBVCC = 5.25 V Comparator C and Comparator D 60 µA CC_CDVCC = 3.3 V 120 170 µA CC_CDVCC = 5.25 V Propagation Delay Time VCM = AVCC/2, VOVERDRIVE = 200 mV differential High to Low, tPHL Comparator A and Comparator B 1.4 3.5 µs CA_CBVCC = 2.7 V 0.95 µs CA_CBVCC = 5 V Comparator C and Comparator D 0.20 0.32 µs CC_CDVCC = 2.7 V 0.13 µs CC_CDVCC = 5 V Low to High, tPLH Comparator A and Comparator B 2 4 µs CA_CBVCC = 2.7 V 0.93 µs CA_CBVCC = 5 V Comparator C and Comparator D 0.18 0.28 µs CC_CDVCC = 2.7 V 0.12 µs CC_CDVCC = 5 V Delay Matching VCM = AVCC 2, VOVERDRIVE = 200 mV differential Comparator A and Comparator B ±250 ns Comparator C and Comparator D ±10 ns |
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