8

LT1681

1681f

PI FU CTIO S

The error amplifier can also be configured as a

transimpedance amplifier for use in secondary-side con-

troller applications. (See Applications Information section

for configuration and compensation details)

SENSE (Pin 11): Current Sense Amplifier (CSA) Nonin-

verting Input. Current is monitored via a ground refer-

enced current sense resistor, typically in series with the

source of the bottom-side switch FET. Internal limit cir-

cuitry provides for a maximum peak value of 150mV across

the sense resistor during normal operation.

and shuts down the primary switches if a current runaway

during the current sense blanking interval. The pin is

typically connected to the primary bottom-side switch

source and monitors switch current via a ground-refer-

enced current sense resistor. If the pin voltage exceeds

360mV, LT1681 switching function is disabled in 130ns.

reset, resulting in a graceful recovery from a current

runaway event. For single-sense resistor systems, this pin

can be shorted to SENSE for protection during the blank-

ing interval or shorted to SGND if not used.

SG (Pin 13): Synchronous Switch Output Driver. This pin

can be connected directly to the gate of the synchronous

the use of a gate drive buffer is recommended for peak

efficiencies.

The SG pin output is synchronized and out-of-phase with

the BG output. The control timing of the SG output causes

its transition to “lead” the primary switch path during turn-

on by 150ns.

The LT1681 incorporates undervoltage lockout that dis-

to 18V (20V absolute maximum).

PWRGND (Pin 15): Output Driver Ground Reference.

capacitor.

BG (Pin 16): Bottom-Side Primary Switch/Forward Switch

Output Driver. Pin can be connected directly to gate of

primary bottom-side and forward switches if small FETs

drive buffer is recommended for peak efficiencies.

The BG output is enabled at the start of each oscillator

cycle in phase with the TG pin but is timed to “lag” the TG

output during turn-on and “lead” the TG output during

turn-off. These delays force the concentration of transi-

tional losses onto the bottom-side primary switch.

BLKSENS (Pin 17): Blanking Sense Input. The current

sense function (via SENSE pin) is disabled while the

BLKSENS pin is below 5V. BLKSENS is typically con-

nected to the gate of the bottom-side primary switch

MOSFET.

nects to source of topside external power FET switch.

TG (Pin 19): Topside (Boosted) Primary Output Driver. Pin

can be connected directly to gate of primary topside

the use of a gate drive buffer is recommended for peak

efficiencies.

ply. This “boosted” supply rail is referenced to the BSTREF

pin.

Supply voltage is maintained by a bootstrap capacitor tied

pin. The charge on the capacitor is refreshed each switch

the total load capacitance on the TG pin. A capacitor in the

range of 0.1

µF to 1µF is generally adequate for most

applications. The bootstrap diode must have a reverse-

90V (absolute maximum) referenced to ground.

Undervoltage lockout disables the topside switch until

switch.