7

LT1681

1681f

PI FU CTIO S

voltage on the pin is reduced to 1.5V, the pin becomes high

impedance and the charging cycle repeats. The oscillator

operates at twice the switching frequency of the controller.

relation:

fC

R

R

OSC

FSET

FSET

FSET

≅+

+

+









































05 10

3

810

2

64

1

1

.•

•

––

–

–

SYNC (Pin 7): Oscillator Synchronization Input Pin with

TTL-Level Compatible Input. The SYNC input signal (at the

desired synchronized operating frequency) controls both

the internal oscillator (running at twice the SYNC fre-

quency) and the output switch phase. If the synchroniza-

tion function is not desired, this pin may be shorted to

ground.

The LT1681 internal oscillator drives a toggle flip-flop that

assures

≤50% duty cycle operation during oscillator free-

run. The oscillator, therefore, runs at twice the operating

frequency of the converter. The SYNC input decoder

incorporates a frequency doubling circuit for oscillator

synchronization, resetting the internal oscillator on both

the rising and falling edges of the input signal.

The SYNC input decoder also differentiates transition

phase and forces the toggle flip-flop to phase-lock with the

SYNC input. A transition to logic high on the SYNC input

signal corresponds to the initiation of a new switching

cycle (primary switches turning on pending current con-

trol) and a transition to logic low forces a primary switch

off state. As such, the maximum operating duty cycle is

equal to the duty cycle of the SYNC signal. The SYNC input

can therefore be used to reduce the maximum duty cycle

of the converter by reducing the duty cycle of the SYNC

input.

pin to ground.

The output voltage of the LT1681 error amplifier corre-

sponds to the peak current sense amplifier output de-

tected before resetting the switch outputs. The soft-start

circuit forces the error amplifier output to a zero sense

current for start-up. A 10

µA current is forced from this pin

onto an external capacitor. As the SS pin voltage ramps

up, so does the LT1681 internally sensed current limit.

This effectively forces the internal current limit to ramp

from zero, allowing overall converter current to slowly

increase until normal output regulation is achieved. This

function reduces output overshoot on converter start-up.

The SS pin voltage is reset to start-up condition during

shutdown, undervoltage lockout and overvoltage or

overcurrent events, yielding a graceful converter output

recovery from these events.

connected to a resistor divider from the output and com-

Input bias current of ~50nA forces the pin high in the event

of an open-feedback path condition. The error amplifier is

internally referenced to 1.25V.

amplifier is a low impedance output inverting gain stage.

The amplifier has ample current source capability to allow

easy integration of isolation optocouplers that require bias

reduces the external current sourcing capacity of the

The error amplifier is typically configured using a feedback

RC network to realize an integrator circuit. This circuit

creates the dominant pole for the converter regulation

feedback loop. Integrator characteristics are dominated

pin. Specific integrator characteristics can be configured

to optimize transient response.