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HT85F2250 数据表(PDF) 67 Page - Holtek Semiconductor Inc |
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HT85F2250 数据表(HTML) 67 Page - Holtek Semiconductor Inc |
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67 / 187 page ![]() Rev. 1.10 67 of 187 ���� �1� �01� A/D Flash 8051 Core Low Pin Count MCU HT85F2250/HT85F2262 IEN1 Register SFR Address: A9h Bit 7 6 5 4 3 2 1 0 Name EXEN� SWDT — ECMP ECCU� ECCU� ECCU1 ECCU0 R/W R/W R/W — R/W R/W R/W R/W R/W POR 0 0 — 0 0 0 0 0 Bit 7 EXEN2: Timer 2 external reload interrupt enable Described elsewhere Bit 6 SWDT: Watchdog timer start/refresh flag This bit is used to activate and refresh the watchdog timer. When this bit is set to “1” directly after the WDT bit is set, a watchdog timer refresh will be enabled. This bit is immediately cleared by hardware. This bit is always read as “0”. Bit 5 Unimplemented, read as “0” Bit 4 ECMP: Comparator overall interrupt enable Described elsewhere Bit 3 ECCU3: CCU3 interrupt enable Described elsewhere Bit 2 ECCU2: CCU2 interrupt enable Described elsewhere Bit 1 ECCU1: CCU1 interrupt enable Described elsewhere Bit 0 ECCU0: CCU0 interrupt enable Described elsewhere WDTREL Register SFR Address: 86h Bit 7 6 5 4 3 2 1 0 Name D7 D6 D� D4 D� D� D1 D0 R/W R/W R/W R/W R/W R/W R/W R/W R/W POR 0 0 0 0 0 0 0 0 Bit 7~0 Watchdog reload value Reload value for the highest 8 bits of the watchdog timer. This value is loaded to the Watchdog Timer when a refresh is triggered by the consecutive setting of bits, WDT and SWDT. |
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