MB91F525FHDPMC datasheet(140/280 Pages) CYPRESS

140 / 280 page

Document Number: 002-04662 Rev. *F

Page 140 of 280

MB91520 Series

AC Characteristics

(1) Main Clock Timing

(TA: -40 °C to +125 °C, VCC = AVCC = 5.0 V ± 10 %/VCC = AVCC = 3.3 V ± 0.3 V, VSS = AVSS = 0.0 V)

Parameter

Symbol

Name

Conditions

Value

Unit

Remarks

Min

Typ

Max

Source oscillation

clock frequency

X0, X1

MHz

Source oscillation

clock cycle time

tCYL

X0, X1

62.5

250

Internal operating

clock frequency*1

FCP

MHz

CPU clock

FCPP

Peripheral bus

clock

FCPT

External bus clock

(When VCC = 5.0 V

is used) *2

External bus clock

(When VCC = 3.3 V

is used)

Internal operating

clock cycle time*1

tCP

12.5

500

CPU clock

tCPP

1000

Peripheral bus

clock

tCPT

1000

External bus clock

(When VCC = 5.0 V

is used)

31.25

1000

External bus clock

(When VCC = 3.3 V

is used)

CAN PLL jitter

(during lock)

tPJ

-10

FCP = 80 MHz

(4 MHz Multiplied

by 20)

Built-in CR

oscillation

frequency

FCCR

100

150

kHz

*1: The maximum / minimum value is defined when using the main clock and PLL clock.

*2: Please use it with external load capacity 12 pF or less for VCC = 3.3 V ± 0.3 V (40 MHz operation).

 X0,X1 clock timing

tCYL

MB91F525FHDPMC 数据表(PDF) 140 Page - Cypress Semiconductor

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