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TUSB1002AI 数据表(PDF) 17 Page - Texas Instruments

部件名 TUSB1002AI
功能描述  USB3.2 10 Gbps Dual-Channel Linear Redriver
PDF  31 Pages
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制造商  TI1 [Texas Instruments]
网页  http://www.ti.com
标志 TI1 - Texas Instruments

TUSB1002AI 数据表(HTML) 17 Page - Texas Instruments

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TUSB1002A
www.ti.com
SLLSF63 – MARCH 2018
Product Folder Links: TUSB1002A
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Copyright © 2018, Texas Instruments Incorporated
7.3.4 USB3.2 Dual Channel Operation (MODE = “F”)
The TUSB1002A in dual-channel operation waits for far-end terminations on both channels 1 and 2 before
transitioning to fully active state (U0 mode). This mode of operation, defined as MODE pin = ‘F’, is the most
common configuration for USB3.2 Source (DFP) and Sink (UFP) applications.
In a USB3.2 x2 application, two TUSB1002A redrivers are used: One on the config lane and the other on the
non-config lane. The TUSB1002A on the non-config lane must be placed in basic redriver mode (MODE pin =
"0"). The TUSB1002A on the config lane should be placed in USB3.2 dual channel operation (MODE pin = "F").
The expectation is the USB power delivery (PD) controller will hold both TUSB1002A in shutdown mode until a
connection can be established. Upon establishing a connection, the USB PD controller will place each
TUSB1002A into the appropriate mode.
7.3.5 USB3.2 Single Channel Operation (MODE = “1”)
In some applications, like Type-C USB3.2 active cables, only one of the two channels may be active. For this
application, setting MODE pin = ‘1’, enables single-channel operation. In this mode of operation, the TUSB1002A
attempts far-end termination on both channels 1 and 2. The channel which has a far-end termination detected is
enabled while the remaining channel is disabled. If far-end termination is detected on both channels, then
TUSB1002A behaves in dual channel operation (both channels enabled).
7.3.6 PCIe/SATA/SATA Express Redriver Operation (MODE = “R”; CFG1 = "0"; CFG2 = "0" )
The TUSB1002A can be used as a PCI Express (PCIe) Gen3, SATA Gen3, or SATA Express redriver. When
TUSB1002A's MODE pin = “R”, CFG1 pin = "0", and CFG2 pin = "0", the TUSB1002A enables both channels
(upstream and downstream) receiver and transmitter paths upon detecting far-end termination on both TX1 and
TX2. Both upstream and downstream paths remain enabled until EN pin is de-asserted low. All USB3.2 power
management functionality is disabled in this mode. In this mode, the TUSB1002A is transparent to PCIe link
power management (L0s, L1) and SATA interface power states. Once far-end termination is detected on both
TX1 and TX2, the TUSB1002A power is at P(U0_SSP_1200mV) regardless of the PCIe or SATA power state. To save
power during system S3/S4/S5 states it is suggested to de-assert the EN pin to conserve power.
NOTE
In this mode the linearity range will be fixed at 1200mVpp and DC gain to 0dB.
7.3.7 Basic Redriver Operation (MODE = “0”)
The TUSB1002A can be used as a basic redriver for non-USB3.2 x1 applications. When the TUSB1002A MODE
pin = “0”, the TUSB1002A enables both channels receiver and transmitter paths. The channel receiver and
transmitter termination are both enabled. All USB3.2 power management functionality is disabled.



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