AD8392

Rev. 0 | Page 16 of 16

OUTLINE DIMENSIONS

COMPLIANT TO JEDEC STANDARDS MO-153AET

1.05

1.00

0.80

SEATING

PLANE

1.20

MAX

0.15

0.00

0.30

0.19

4.50

4.40

4.30

28

15

14

1

9.80

9.70

9.60

PIN 1

6.40

BSC

0.65

BSC

0.20

0.09

8°

0°

EXPOSED

PAD

(Pins Down)

3.00

BSC

3.50

BSC

BOTTOM VIEW

0.75

0.60

0.45

Figure 41. 28-Lead Thin Shrink Small Outline with Exposed Pad [TSSOP/EP]

(RE-28-1)

Dimensions shown in millimeters

COMPLIANT TO JEDEC STANDARDS MO-220-VHHD-2

0.30

0.23

0.18

0.20 REF

0.80 MAX

0.65 TYP

0.05 MAX

0.02 NOM

12° MAX

1.00

0.85

0.80

SEATING

PLANE

COPLANARITY

0.08

1

32

8

9

25

24

16

17

BOTTOM

VIEW

0.50

0.40

0.30

3.50 REF

0.50

BSC

3.25

3.10 SQ

2.95

0.60 MAX

0.60 MAX

0.25 MIN

TOP

VIEW

PIN 1

INDICATOR

PIN 1

INDICATOR

5.00

BSC SQ

4.75

BSC SQ

Figure 42. 32-Lead Lead Frame Chip Scale Package [LFCSP]

5 mm × 5 mm Body (CP-32-2)

Dimensions shown in millimeters

ORDERING GUIDE

Model

Temperature Range

Package Description

Package Outline

AD8392ARE

−40°C to +85°C

28-Lead Thin Shrink Small Outline Package (TSSOP)

RE-28-1

AD8392ARE-REEL

−40°C to +85°C

28-Lead Thin Shrink Small Outline Package (TSSOP)

RE-28-1

AD8392ARE-REEL7

−40°C to +85°C

28-Lead Thin Shrink Small Outline Package (TSSOP)

RE-28-1

AD8392ACP-R2

−40°C to +85°C

32-Lead Lead Frame Chip Scale Package (LFCSP)

CP-32-2

AD8392ACP-REEL

−40°C to +85°C

32-Lead Lead Frame Chip Scale Package (LFCSP)

CP-32-2

AD8392ACP-REEL7

−40°C to +85°C

32-Lead Lead Frame Chip Scale Package (LFCSP)

CP-32-2

© 2004 Analog Devices, Inc. All rights reserved. Trademarks and regis-

tered trademarks are the property of their respective owners.

D04802–0–7/04(0)