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LTP5901-IPR 数据表(PDF) 20 Page - Linear Technology

部件名 LTP5901-IPR
功能描述  SmartMesh IP Network Manager 2.4GHz 802.15.4e Wireless Embedded Manager
PDF  34 Pages
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制造商  LINER [Linear Technology]
网页  http://www.linear.com
标志 LINER - Linear Technology

LTP5901-IPR 数据表(HTML) 20 Page - Linear Technology

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LTP5901-IPR/LTP5902-IPR
20
59012iprfa
For more information www.linear.com/LTP5901-IPR or www.linear.com/LTP5902-IPR
pin FuncTions
NO SPECIAL PURPOSE
TYPE
I/O
PULL DESCRIPTION
63 TIMEn
1 (Note 13)
I
-
Time Capture Request, Active Low
NO CLI AND EXTERNAL MEMORY
TYPE
I/O
PULL DESCRIPTION
25 EB_DATA_7
1
I/O
-
External Bus Data Bit 7
26 EB_DATA_6
1
I/O
-
External Bus Data Bit 6
27 EB_DATA_4
1
I/O
-
External Bus Data Bit 4
28 EB_DATA_0
1
I/O
-
External Bus Data Bit 0
31 UARTC0_TX
EB_IO_LE0
2
O
O
-
CLI UART 0 Transmit
External Bus I/O Latch Enable 0 for External Address Bits A[25:18]
32 UARTC0_RX
EB_DATA_1
1
I
I/O
-
CLI UART 0 Receive
External Bus Data Bit 1
38 EB_IO_LE2
1
O
-
External Bus I/O Latch Enable 2 for External Address Bits A[9:2]
40 EB_ADDR_1
2
O
-
External Bus Address Bit 1
41 EB_ADDR_0
2
O
-
External Bus Address Bit 0
43 EB_DATA_3
1
I/O
-
External Bus Data Bit 3
44 EB_DATA_2
1
I/O
-
External Bus Data Bit 2
45 EB_DATA_5
1
I/O
-
External Bus Data Bit 5
46 EB_IO_CS0n
2
O
-
External Bus Chip Select 0
47 UARTC1_TX
2
O
-
CLI UART 1 Transmit
48 UARTC1_RX
1
I
-
CLI UART 1 Receive
49 EB_IO_WEn
2
O
-
External Bus Write Enable Strobe
50 EB_IO_OEn
2
O
-
External Bus Output Enable Strobe
NO IPCS SPI/FLASH PROGRAMMING (NOTE 14)
TYPE
I/O
PULL DESCRIPTION
33 IPCS_MISO
2
O
-
SPI Flash Emulation (MISO) Master in Slave Out Port
35 IPCS_MOSI
1
I
-
SPI Flash Emulation (MOSI) Master Out Slave in Port
36 IPCS_SCK
1
I
-
SPI Flash Emulation (SCK) Serial Clock Port
39 IPCS_SSn
1
I
-
SPI Flash Emulation Slave Select, Active Low
51 FLASH_P_ENn
EB_IO_LE1
1
I
O
UP
UP
Flash Program Enable, Active Low
External Bus I/O Latch Enable 1
NO API UART
TYPE
I/O
PULL DESCRIPTION
57 UART_RX_RTSn
1 (Note 13)
I
-
UART Receive (RTS) Request to Send, Active Low
58 UART_RX_CTSn
1
O
-
UART Receive (CTS) Clear to Send, Active Low
59 UART_RX
1 (Note 13)
I
-
UART Receive
60 UART_TX_RTSn
1
O
-
UART Transmit (RTS) Request to Send, Active Low
61 UART_TX_CTSn
1 (Note 13)
I
-
UART Transmit (CTS) Clear to Send, Active Low
62 UART_TX
2
O
-
UART Transmit
Note 13: These inputs are always enabled and must be driven or pulled to
a valid state to avoid leakage.
Note 14: Embedded programming over the IPCS SPI bus is only available
when RESETn is asserted.
Pin functions shown in italics are currently not supported in software.



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