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LTP5901-IPR 数据表(PDF) 24 Page - Linear Technology

部件名 LTP5901-IPR
功能描述  SmartMesh IP Network Manager 2.4GHz 802.15.4e Wireless Embedded Manager
PDF  34 Pages
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制造商  LINER [Linear Technology]
网页  http://www.linear.com
标志 LINER - Linear Technology

LTP5901-IPR 数据表(HTML) 24 Page - Linear Technology

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LTP5901-IPR/LTP5902-IPR
24
59012iprfa
For more information www.linear.com/LTP5901-IPR or www.linear.com/LTP5902-IPR
operaTion
32.768kHz Crystal
Once Eterna is powered up and the 32.768kHz crystal
source has begun oscillating, the 32.768kHz crystal re-
mains operational while in the active state, and is used as
the timing basis when in doze state. See the State Diagram
section, for a description of Eterna’s operational states.
20MHz Crystal
The 20MHz crystal source provides a frequency reference
for the radio, and is automatically enabled and disabled
by Eterna as needed.
RADIO
Eterna includes the lowest power commercially available
2.4GHz IEEE 802.15.4e radio by a substantial margin.
(Please refer to section Radio Specifications, for power
consumption numbers). Eterna’s integrated power ampli-
fier is calibrated and temperature-compensated to con-
sistently provide power at a limit suitable for worldwide
radio certifications. Additionally, Eterna uniquely includes
a hardware-based autonomous MAC that handles precise
sequencing of peripherals, including the transmitter, the
receiver, and advanced encryption standard (AES) periph-
erals. The hardware-based autonomous media access
controller (MAC) minimizes CPU activity, thereby further
decreasing power consumption.
UARTS
The principal network interface is through the applica-
tion programming interface (API) UART. A command-line
interface (CLI) is also provided for support of test and
debug functions. Both UARTs sense activity continuously,
consuming virtually no power until data is transferred over
the port and then automatically returning to their lowest
power state after the conclusion of a transfer. The defini-
tion for packet encoding on the API UART interface can
be found in the SmartMesh IP Manager API Guide and the
CLI command definitions can be found in the SmartMesh
IP Manager CLI Guide.
API UART PROTOCOL
The API UART protocol was created with the goal of sup-
portingawiderangeofcompanionmultipointcontrolunits
(MCUs)whilereducingpowerconsumptionofthesystem.
The receive half of the API UART protocol includes two ad-
ditional signals in addition to UART_RX: UART_RX_RTSn
and UART_RX_CTSn. The transmit half of the API UART
protocol includes two additional signals in addition to
UART_TX: UART_TX_RTSn and UART_TX_CTSn. The
API UART protocol is referred to as Mode 4.
In the figures accompanying the protocol descriptions,
signals driven by the companion processor are drawn
in black and signals driven by Eterna are drawn in blue.
UART Mode 4
UART Mode 4 incorporates level-sensitive flow control
on the TX channel and requires no flow control on the
RX channel, supporting 115200 baud. The use of level-
sensitive flow control signals enables higher data rates
with the option of using a reduced set of the flow control
signals; however, Mode 4 has specific limitations. First,
the use of the RX flow control signals (UART_RX_RTSn
and UART_RX_CTSn) for Mode 4 are optional provided
the use is limited to the industrial temperature range
(–40°C to 85°C); otherwise, the flow control is mandatory.
If RX flow control signals are not used, UART_RX_RTSn
shouldbetiedtoVSUPPLY(inactive)andUART_RX_CTSn
should be left unconnected. Second, unless the com-
panion processor is always ready to receive a packet,
the companion processor must negate UART_TX_CTSn
prior to the end of the current packet. Failure to negate
UART_TX_CTSn prior to the end of a packet may result
in back to back packets. Third, the companion processor
must wait at least tRX_INTERPACKET between transmitting
packets on UART_RX. See the UART AC Characteristics
section for complete timing specifications. Packets are
HDLC encoded with one stop bit and no parity bit. The flow
control signals for the TX channel are shown in Figure 11.
TransfersareinitiatedbyEternaassertingUART_TX_RTSn.



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